Patents by Inventor Kenjiro Nishino

Kenjiro Nishino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Combination flash memory and dram memory board interleave-bypass memory access method, and memory access device incorporating both the same
    Patent number: 5966727
    Abstract: A memory board which functions as a main memory of a CPU, is accessible at high speed and is usable in a disk manner is proposed. A flash memory and a D-RAM are mounted on the memory board. The flash memory has a S-RAM interface which synthesizes a row address and a column address transmitted via an address bus, through a latch circuit or a signal processing circuit, to define an address. The CPU, when accessing an address in the flash memory, converts an address signal using an interleave rule in reverse, and transmits the converted address to a system logic. As a result, data can be written into contiguously allotted addresses in the flash memory. The flash memory can thus be used in a disk-like manner.
    Type: Grant
    Filed: June 16, 1997
    Date of Patent: October 12, 1999
    Assignee: Dux Inc.
    Inventor: Kenjiro Nishino