Patents by Inventor Kenju Nishikido

Kenju Nishikido has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11877078
    Abstract: The deterioration of light condensing characteristics of an overall solid-state imaging device resulting from providing in-layer lenses is suppressed while preventing the deterioration of device characteristics of the solid-state imaging device and reduction of yield.
    Type: Grant
    Filed: January 11, 2023
    Date of Patent: January 16, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kenta Nojima, Kenju Nishikido
  • Patent number: 11575848
    Abstract: There is provided a solid-state imaging device including a semiconductor substrate on which photoelectric conversion devices are arranged in an imaging device region in a two-dimensional array, and a stacked body formed by stacking layers on the semiconductor substrate, wherein the stacked body includes an in-layer lens layer that has in-layer lenses each provided at a position corresponding to each of the photoelectric conversion devices, a planarization layer that is stacked on the in-layer lens layer and that has a generally planarized surface, and an on-chip lens layer that is an upper layer than the planarization layer and that has on-chip lenses each provided at a position corresponding to each of the photoelectric conversion devices, and the in-layer lens layer has structures at a height generally equal to a height of the in-layer lenses, the structures being provided on an outside of the imaging device region.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: February 7, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kenta Nojima, Kenju Nishikido
  • Publication number: 20220293662
    Abstract: The present technique relates to a solid-state image pickup element and an electronic apparatus each of which enables a pad to be formed in a shallow position while reduction of a quality of a back side illumination type solid-state image pickup element is suppressed. The solid-state image pickup element includes a pixel substrate in which a light condensing layer for condensing incident light on a photoelectric conversion element, a semiconductor layer in which the photoelectric conversion element is formed, and a wiring layer in which a wiring and a pad for outside connection are formed are laminated on one another, and at least a part of a first surface of the pad is exposed through a through hole completely extending through the light condensing layer and the semiconductor layer. The present technique, for example, can be applied to a back side illumination type CMOS image sensor.
    Type: Application
    Filed: May 31, 2022
    Publication date: September 15, 2022
    Applicant: SONY GROUP CORPORATION
    Inventors: Keishi INOUE, Kenju NISHIKIDO
  • Patent number: 11398518
    Abstract: The present technique relates to a solid-state image pickup element and an electronic apparatus each of which enables a pad to be formed in a shallow position while reduction of a quality of a back side illumination type solid-state image pickup element is suppressed. The solid-state image pickup element includes a pixel substrate in which a light condensing layer for condensing incident light on a photoelectric conversion element, a semiconductor layer in which the photoelectric conversion element is formed, and a wiring layer in which a wiring and a pad for outside connection are formed are laminated on one another, and at least a part of a first surface of the pad is exposed through a through hole completely extending through the light condensing layer and the semiconductor layer. The present technique, for example, can be applied to a back side illumination type CMOS image sensor.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: July 26, 2022
    Assignee: SONY CORPORATION
    Inventors: Keishi Inoue, Kenju Nishikido
  • Patent number: 11362122
    Abstract: Variations in photoelectric conversion performance between pixels (valid pixels and light-shielding pixels) in an imaging element are reduced.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: June 14, 2022
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kenju Nishikido, Suguru Moriyama
  • Publication number: 20220139992
    Abstract: There is provided an image sensor including a first substrate including a plurality of pixels and a plurality of vertical signal lines and a plurality of first wiring layers and a second substrate including a plurality of second wiring layers. The first and second substrates are secured together between the pluralities of first and second wiring layers. First pads are provided between one of the plurality of first wiring layers and one of the plurality of second wiring layers and second pads are provided between another of the plurality of first wiring layers and another of the plurality of second wiring layers. First vias and second vias connect the first pads and the one of the plurality of first wiring layers and the one of the plurality of second wiring layers together.
    Type: Application
    Filed: February 28, 2020
    Publication date: May 5, 2022
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Tomomi ITO, Kazuyoshi YAMASHITA, Atsushi MASAGAKI, Shinobu ASAYAMA, Shinya ITOH, Haruyuki NAKAGAWA, Kyohei MIZUTA, Susumu OOKI, Osamu OKA, Kazuto KAMIMURA, Takuji MATSUMOTO, Kenju NISHIKIDO
  • Publication number: 20220068991
    Abstract: A light-shielding body that shields incident light from an adjacent pixel is easily formed even in a case where the pixel is made finer. An imaging element is provided with a photoelectric conversion unit, an insulating film, an incident light transmitting film, and a light-shielding body. The photoelectric conversion unit is formed in a semiconductor substrate to perform photoelectric conversion of incident light from a subject and is arranged in a plurality of pixels. The insulating film is arranged on a plurality of pixels to insulate the semiconductor substrate. The incident light transmitting film is arranged adjacent to the insulating film of the plurality of pixels and transmits the incident light. The light-shielding body is arranged in a groove formed in the incident light transmitting film on a peripheral edge of each of the plurality of pixels to shield the incident light.
    Type: Application
    Filed: November 22, 2019
    Publication date: March 3, 2022
    Inventors: Yoshikazu TANAKA, Nobuyuki OHBA, Sintaro NAKAJIKI, Yukihiro SAYAMA, Yuka OHKUBO, Tsubasa NISHIYAMA, Kenju NISHIKIDO, Yousuke HAGIHARA
  • Publication number: 20210384248
    Abstract: To reduce reflection of incident light at a peripheral edge portion of an image sensor and prevent deterioration of the image quality. The image sensor includes an imaging area arranged on a semiconductor substrate, a wiring area, a protective film, and a protrusion arranged at the bottom of an opening formed in the semiconductor substrate. In the imaging area, a photoelectric conversion unit formed on a semiconductor substrate and performing photoelectric conversion of incident light is arranged. The wiring area has a wiring of transmitting a signal of the photoelectric conversion unit and is arranged adjacent to the front surface of the semiconductor substrate. The protective film is arranged on the back surface that is a surface different from the front surface of the semiconductor substrate, to transmit the incident light and protect the back surface of the semiconductor.
    Type: Application
    Filed: October 15, 2019
    Publication date: December 9, 2021
    Inventor: KENJU NISHIKIDO
  • Publication number: 20210343770
    Abstract: Variations in photoelectric conversion performance between pixels (valid pixels and light-shielding pixels) in an imaging element are reduced.
    Type: Application
    Filed: May 16, 2018
    Publication date: November 4, 2021
    Inventors: KENJU NISHIKIDO, SUGURU MORIYAMA
  • Patent number: 11139329
    Abstract: The present disclosure relates to a solid-state imaging element, a manufacturing method, and an electronic apparatus, in which irregular reflection of light inside a solid-state imaging element package can be suppressed. In the solid-state imaging element, a plurality of pixels is planarly arranged, a connection portion utilized for connection to the outside is provided on a more outer side than an imaging region, and an open portion that is opened up to the connection portion from a light incident surface side of the imaging region where light is incident is formed. Additionally, a plurality of protruding portions periodically arranged is formed on a counterbore surface that is a surface inside the open portion excluding the connection portion. The present technology can be applied to, for example, a back-illuminated type or layered CMOS image sensor.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: October 5, 2021
    Assignee: SONY CORPORATION
    Inventors: Kenju Nishikido, Takekazu Shinohara, Shinichiro Noudo, Misato Kondo
  • Publication number: 20210183934
    Abstract: The present disclosure relates to a solid-state imaging element, a manufacturing method, and an electronic apparatus, in which irregular reflection of light inside a solid-state imaging element package can be suppressed. In the solid-state imaging element, a plurality of pixels is planarly arranged, a connection portion utilized for connection to the outside is provided on a more outer side than an imaging region, and an open portion that is opened up to the connection portion from a light incident surface side of the imaging region where light is incident is formed. Additionally, a plurality of protruding portions periodically arranged is formed on a counterbore surface that is a surface inside the open portion excluding the connection portion. The present technology can be applied to, for example, a back-illuminated type or layered CMOS image sensor.
    Type: Application
    Filed: June 30, 2017
    Publication date: June 17, 2021
    Applicant: SONY CORPORATION
    Inventors: Kenju NISHIKIDO, Takekazu SHINOHARA, Shinichiro NOUDO, Misato KONDO
  • Publication number: 20210043674
    Abstract: The present technique relates to a solid-state image pickup element and an electronic apparatus each of which enables a pad to be formed in a shallow position while reduction of a quality of a back side illumination type solid-state image pickup element is suppressed. The solid-state image pickup element includes a pixel substrate in which a light condensing layer for condensing incident light on a photoelectric conversion element, a semiconductor layer in which the photoelectric conversion element is formed, and a wiring layer in which a wiring and a pad for outside connection are formed are laminated on one another, and at least a part of a first surface of the pad is exposed through a through hole completely extending through the light condensing layer and the semiconductor layer. The present technique, for example, can be applied to a back side illumination type CMOS image sensor.
    Type: Application
    Filed: October 21, 2020
    Publication date: February 11, 2021
    Applicant: SONY CORPORATION
    Inventors: Keishi INOUE, Kenju NISHIKIDO
  • Publication number: 20210006737
    Abstract: There is provided a solid-state imaging device including a semiconductor substrate on which photoelectric conversion devices are arranged in an imaging device region in a two-dimensional array, and a stacked body formed by stacking layers on the semiconductor substrate, wherein the stacked body includes an in-layer lens layer that has in-layer lenses each provided at a position corresponding to each of the photoelectric conversion devices, a planarization layer that is stacked on the in-layer lens layer and that has a generally planarized surface, and an on-chip lens layer that is an upper layer than the planarization layer and that has on-chip lenses each provided at a position corresponding to each of the photoelectric conversion devices, and the in-layer lens layer has structures at a height generally equal to a height of the in-layer lenses, the structures being provided on an outside of the imaging device region.
    Type: Application
    Filed: September 22, 2020
    Publication date: January 7, 2021
    Inventors: KENTA NOJIMA, KENJU NISHIKIDO
  • Patent number: 10854657
    Abstract: The present technique relates to a solid-state image pickup element and an electronic apparatus each of which enables a pad to be formed in a shallow position while reduction of a quality of a back side illumination type solid-state image pickup element is suppressed. The solid-state image pickup element includes a pixel substrate in which a light condensing layer for condensing incident light on a photoelectric conversion element, a semiconductor layer in which the photoelectric conversion element is formed, and a wiring layer in which a wiring and a pad for outside connection are formed are laminated on one another, and at least a part of a first surface of the pad is exposed through a through hole completely extending through the light condensing layer and the semiconductor layer. The present technique, for example, can be applied to a back side illumination type CMOS image sensor.
    Type: Grant
    Filed: January 5, 2017
    Date of Patent: December 1, 2020
    Assignee: Sony Corporation
    Inventors: Keishi Inoue, Kenju Nishikido
  • Patent number: 10812747
    Abstract: A solid-state imaging device including a semiconductor substrate on which a plurality of photoelectric conversion devices are arranged in an imaging device region in a two-dimensional array and a stacked body formed by stacking a plurality of layers on the semiconductor substrate. The stacked body includes an in-layer lens layer that has in-layer lenses each provided at a position corresponding to each of the photoelectric conversion devices. The solid-state imaging device further includes a planarization layer that is stacked on the in-layer lens layer and an on-chip lens layer that is an upper layer than the planarization layer and that has on-chip lenses each provided at a position corresponding to each of the photoelectric conversion devices. The in-layer lens layer has a plurality of structures at a height equal to a height of the in-layer lenses, the plurality of structures being provided on an outside of the imaging device region.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: October 20, 2020
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kenta Nojima, Kenju Nishikido
  • Publication number: 20200168653
    Abstract: The present technique relates to a solid-state image pickup element and an electronic apparatus each of which enables a pad to be formed in a shallow position while reduction of a quality of a back side illumination type solid-state image pickup element is suppressed. The solid-state image pickup element includes a pixel substrate in which a light condensing layer for condensing incident light on a photoelectric conversion element, a semiconductor layer in which the photoelectric conversion element is formed, and a wiring layer in which a wiring and a pad for outside connection are formed are laminated on one another, and at least a part of a first surface of the pad is exposed through a through hole completely extending through the light condensing layer and the semiconductor layer. The present technique, for example, can be applied to a back side illumination type CMOS image sensor.
    Type: Application
    Filed: January 5, 2017
    Publication date: May 28, 2020
    Applicant: SONY CORPORATION
    Inventors: Keishi INOUE, Kenju NISHIKIDO
  • Publication number: 20190215474
    Abstract: The deterioration of light condensing characteristics of an overall solid-state imaging device resulting from providing in-layer lenses is suppressed while preventing the deterioration of device characteristics of the solid-state imaging device and reduction of yield.
    Type: Application
    Filed: June 23, 2017
    Publication date: July 11, 2019
    Inventors: KENTA NOJIMA, KENJU NISHIKIDO
  • Patent number: 10088608
    Abstract: The present technology relates to a lens array and a manufacturing method therefor, a solid-state imaging apparatus, and an electronic apparatus that can improve the AF performance while suppressing the deterioration of image quality. A lens array includes microlenses that are formed corresponding to phase difference detection pixels that are provided to be mixed in imaging pixels. Each of the microlenses is formed such that a lens surface thereof is a substantially spherical surface, the microlens has a rectangular shape in a planar view and four corners are not substantially rounded, and a bottom surface in vicinity of an opposite-side boundary portion that includes an opposite-side center portion of a pixel boundary portion in a cross-sectional view is higher than a bottom surface in vicinity of a diagonal boundary portion that includes a diagonal boundary portion. The present technology is applicable to a lens array of a CMOS image sensor, for example.
    Type: Grant
    Filed: September 12, 2014
    Date of Patent: October 2, 2018
    Assignee: SONY CORPORATION
    Inventors: Yoichi Ootsuka, Kenju Nishikido, Ippei Yoshiba
  • Patent number: 9985065
    Abstract: A solid-state imaging device includes: a photodiode formed to be segmented with respect to each pixel in a pixel area in which plural pixels are integrated on a light receiving surface of a semiconductor substrate; an insulator film formed on the semiconductor substrate to cover the photodiode; a recessed part formed with respect to each of the pixels in the insulator film in an upper part of the photodiode; a first light transmission layer of a siloxane resin formed to fill the recessed part and configure an optical waveguide in the pixel area; a second light transmission layer formed to configure an on-chip lens with respect to each of the pixels in the pixel area; and a guard ring formed to surround an outer circumference of the pixel area to partition an inner area containing the pixel area and an outer dicing area.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: May 29, 2018
    Assignee: Sony Corporation
    Inventors: Hideki Hirano, Akiko Ogino, Kenju Nishikido, Iwao Sugiura, Haruhiko Ajisawa, Ikuo Yoshihara
  • Patent number: 9472589
    Abstract: An solid-state imaging device includes a pixel region formed on a semiconductor substrate, an effective pixel region and a shielded optical black region in the pixel region, a multilayer wiring layer formed on a surface of the side opposite to a light incident side of the semiconductor substrate, a supporting substrate bonded to a surface of the multilayer wiring layer side, and an antireflection structure that is formed on the bonding surface side of the supporting substrate.
    Type: Grant
    Filed: March 24, 2014
    Date of Patent: October 18, 2016
    Assignee: SONY CORPORATION
    Inventors: Kenju Nishikido, Kazunori Nagahata