Abstract: A circuit for converting a lower voltage logical signal to a higher voltage. The circuit comprises a current mirror structure having first and second branches, each comprising at least a first transistor of a first kind, an input transistor of a second kind, and a second transistor of the first kind coupled between them. The first transistors are arranged as a current mirror. The input transistors are driven using a logical signal at the lower voltage, controlling the current mirror structure to output a corresponding logical signal at the higher voltage. The second transistors are driven by an intermediate reference voltage so as to reduce the operating voltage of the third transistors. The first kind is tolerant of a higher operating voltage than the second kind.

Abstract: A circuit for converting a lower voltage logical signal to a higher voltage. The circuit comprises a current mirror structure having first and second branches, each comprising at least a first transistor of a first kind, an input transistor of a second kind, and a second transistor of the first kind coupled between them. The first transistors are arranged as a current mirror. The input transistors are driven using a logical signal at the lower voltage, controlling the current mirror structure to output a corresponding logical signal at the higher voltage. The second transistors are driven by an intermediate reference voltage so as to reduce the operating voltage of the third transistors. The first kind is tolerant of a higher operating voltage than the second kind.

Abstract: A method (300) for optimising transistor performance in semiconductor integrated circuits built from standard cells (12), or custom transistor level layout, is disclosed. An active area of NMOS diffusion is extended with a joining area (102) between two adjacent cells (112) having the same net on diffusion at the adjacent edges of each cell. The diffusion area is extended to limit the occurrence of active and nonactive interface to minimise lattice strain effects and improve transistor performance.

Abstract: This invention relates to an apparatus for detecting the presence of a specific concentration of a conducting medium (water) in an insulating medium (oil) wherein the water/oil mixture forms an emulsion containing discrete droplets of water. A probe containing two electrodes, the first of which has a flat surface and the second of which is cone-shaped having a vertex directed at the flat surface, is immersed into the emulsion. A pulsating dc voltage is applied to the first electrode producing a static electrical charge which repels the insulating medium while having no effect on the conducting medium, causing droplets of the conducting medium to migrate towards and accumulate in the area between the electrodes. When a sufficient number of droplets have accumulated, a conductive path is formed between the electrodes causing an alarm to be generated.