Patents by Inventor Kenneth D. Smeltzer

Kenneth D. Smeltzer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6965934
    Abstract: A method and system are disclosed for encapsulating SCSI protocol for data transmission between two or more nodes across a packet-based network. The method of the present invention includes the steps of, at each node in the network, identifying all other available nodes on the network, and the remote devices attached to those nodes; representing one or more of the attached remote devices such that they are made available to the node's local hosts; encapsulating the I/O phases between one or more local hosts and one or more of the remote devices; and repeating the encapsulating step for subsequent I/Os between one or more hosts and one or more devices. The step of encapsulating I/O phases between a local host and a remote device can further comprise encapsulating task management functions, error recovery functions and normal I/O processing functions. Each node can be a Fibre Channel-to-SCSI router.
    Type: Grant
    Filed: November 10, 2000
    Date of Patent: November 15, 2005
    Assignee: Crossroads Systems, Inc.
    Inventors: Robert A. Reynolds, John B. Haechten, Kenneth D. Smeltzer
  • Patent number: 6848007
    Abstract: The present invention provides a method and system for mapping addressing of SCSI devices between two SANs connected by a SAN extender over a packet-based network with use of a Fibre channel protocol over large distances. The present invention seamlessly interconnects graphically distinct SANs such that they operate as if they were local to one another by providing a means to generically and dynamically map SCSI device addresses between two SANs. The present invention provides a method and system for accessing a device from a host, wherein the host and device are in separate SANs interconnected by a transport layer, and wherein the interface between said transport layer and each of said SANs is a node. This method comprises, at each node, the steps of: mapping the device address into an intermediary device identifier, and mapping the intermediary device identifier into an address accessible by the host.
    Type: Grant
    Filed: November 10, 2000
    Date of Patent: January 25, 2005
    Assignee: Crossroads Systems, Inc.
    Inventors: Robert A. Reynolds, John B. Haechten, Kenneth D. Smeltzer
  • Patent number: 5600766
    Abstract: In a computer system including a video subsystem, a method for storing and displaying a power on graphical image, comprises the steps of: storing a compressed graphical image in a programmable read-only memory (PROM); initializing a power-on self test (POST); decompressing the compressed graphical image;loading the decompressed graphic image into a random access memory (RAM); and displaying the graphical image during the POST. Also in accordance with another aspect of the invention, a method for adding a user selected graphic image to a system ROM image, comprises the steps of: searching the Flash image file for the graphical image signature (GIS); locating the actual graphical image data with the graphical image header; reading the new graphical image data; overlaying the old graphical image data into a Flash image file; and recalculating the system ROM checksum.
    Type: Grant
    Filed: August 24, 1994
    Date of Patent: February 4, 1997
    Assignee: International Business Machines Corporation
    Inventors: David J. Deckys, Bharat Khatri, George Mathew, Stanley L. Merkin, Kenneth D. Smeltzer, Gary A. Vaiskauckas
  • Patent number: 5530872
    Abstract: A system and method is provided for detecting and correcting a lost hardware interrupt generated by an input/output device in a multiple I/O port computer environment. The lost interrupt condition is caused by the simultaneous occurrence of (i) the reading and subsequent resetting of a interrupt request status bit in an I/O port by a device driver and (ii) the setting of the interrupt request status bit by an I/O device attached to the port. Because the interrupt request status bit is reset before it can be read, the device driver fails to see an acknowledgement of the previous data transmission to the I/O device, and the system encounters a deadlock condition. After a normal timeout timer expires the device driver terminates transmission of data and returns a "cancel or retry" message to the request originator. The present invention prevents a deadlock condition in this situation by providing a second timer in addition to and of significantly less duration than the normal timeout timer.
    Type: Grant
    Filed: December 23, 1992
    Date of Patent: June 25, 1996
    Assignee: International Business Machines Corporation
    Inventors: Kenneth D. Smeltzer, Alan F. Neel, II, Timothy J.-M. Louie, Frank J. Schroeder, James P. Ward, Robert H.-C. Lin, Robert G. Hillis
  • Patent number: 5214695
    Abstract: A personal computer system according to the present invention comprises a system processor, a random access memory, a read only memory, and at least one direct access storage device. A direct access storage device controller coupled between the system processor and direct access storage device includes a protection mechanism for protecting a region of the storage device. The protected region of the storage device includes a master boot record, a BIOS image and a system reference diskette image. The BIOS image includes a section known as Power on Self Test (POST). POST is used to test and initialize a system. Upon detecting any configuration error, system utilities from the system reference diskette image, such as set configuration programs, diagnostic programs and utility programs can be automatically activated from the direct access storage device.
    Type: Grant
    Filed: June 17, 1991
    Date of Patent: May 25, 1993
    Assignee: International Business Machines Corporation
    Inventors: Lisa R. Arnold, Richard Bealkowski, John W. Blackledge, Jr., Doyle S. Cronk, Richard A. Dayan, Douglas R. Geisler, Matthew T. Mittelstedt, Matthew S. Palka, Jr., John D. Paul, Robert Sachsenmaier, Kenneth D. Smeltzer, Peter A. Woytovech, Kevin M. Zyvoloski
  • Patent number: 5128995
    Abstract: A personal computer system according to the present invention comprises a system processor, a random access memory, a read only memory, and at least one direct access storage device. A direct access storage device controller coupled between the system processor and direct access storage device includes a protection mechanism for protecting a region of the storage device. The protected region of the storage device includes a master boot record, a BIOS image and a system reference diskette image. The BIOS image includes a section known as Power on Self Test (POST). POST is used to test and initialize a system. Upon detecting any configuration error, system utilities from the system reference diskette image, such as set configuration programs, diagnostic programs and utility programs can be automatically activated from the direct access storage device.
    Type: Grant
    Filed: July 23, 1990
    Date of Patent: July 7, 1992
    Assignee: International Business Machines Corp.
    Inventors: Lisa R. Arnold, Richard Bealkowski, John W. Blackledge, Jr., Doyle S. Cronk, Richard A. Dayan, Douglas R. Geisler, Matthew T. Mittelstedt, Matthew S. Palka, Jr., John D. Paul, Robert Sachsenmaier, Kenneth D. Smeltzer, Peter A. Woytovech, Kevin M. Zyvoloski