Abstract: A memory card comprising an magnetic random access memory (MRAM) array that comprises a plurality of magnetic memory cells and a controller coupled to the MRAM array. The controller is configured to communicate with a host device, and the controller is configured perform an error correction function associated with at least one of the plurality of magnetic memory cells.

Abstract: A memory device and method of reading the memory device is disclosed. The memory device includes a first string of MRAM cells and a second string of MRAM cells. The first string of MRAM cells include a plurality of MRAM cells connected in series and the second string of MRAM cells include another plurality of MRAM cells connected in series. A common connection is controllably connectable to one end of the first string of MRAM cells, and to one end of the second string of MRAM cells.

Abstract: A memory card comprising an magnetic random access memory (MRAM) array that comprises a plurality of magnetic memory cells and a controller coupled to the MRAM array. The controller is configured to communicate with a host device, and the controller is configured perform an error correction function associated with at least one of the plurality of magnetic memory cells.

Abstract: Systems for translating voltage levels of digital signals are provided. An exemplary system comprises a circuit board operative to use a first digital signal and a second digital signal. The first digital signal operates between a first voltage and a second voltage, with the first voltage corresponding to a logic 0 and the second voltage corresponding to a logic 1. The second digital signal operates between a third voltage and a fourth voltage, with the third voltage and the fourth voltage exhibiting an average value, the absolute value of which is at least an order of magnitude different than an average value of the first voltage and the second voltage. The circuit board is further operative to use the first digital signal to produce the second digital signal. Methods and other systems also are provided.

Abstract: Apparatus and method for making a multi-layered storage structure includes forming a device layer on a single-crystal wafer, cleaving the device layer from the wafer, repeating the forming and cleaving to provide a plurality of cleaved device layers, and bonding the cleaved device layers together to form the multi-layered storage structure.

Abstract: A method for making magnetic random access memories (MRAM) isolates each and every memory cell in an MRAM array during operation until selected. Some embodiments use series connected diodes for such electrical isolation. Only a selected one of the memory cells will then conduct current between respective ones of the bit and word lines. A better, more uniform distribution of read and data-write data access currents results to all the memory cells. In another embodiment, this improvement is used to increase the number of rows and columns to support a larger data array. In a further embodiment, such improvement is used to increase operating margins and reduce necessary data-write voltages and currents.

Abstract: A system comprises a storage controller for managing transfers of data between a host and storage memory; a data mover coupled to the storage controller handling data transferred between a host and storage memory; and a buffer coupled to the data mover for storing data being transferred. The storage controller modifies operation of the storage system based on status of the data transfer. An associate method comprises transferring data between a host and storage memory via a storage system, and dynamically adjusting operation of the storage system depending on status of the data transfer.

Abstract: A storage device comprising a magnetic storage medium mounted in a first plane, a read and write mechanism mounted in a second plane that is parallel to the first plane and configured to write information to the magnetic storage medium, and a micromover configured to move the magnetic storage medium in a first direction parallel to the first plane and configured to move the magnetic storage medium in a second direction parallel to the first plane and perpendicular to the first direction.

Abstract: A magnetic random-access memory (MRAM) cell according to an embodiment of the invention is disclosed that comprises a magnetic storage element having an easy axis and a hard axis, a write conductor positioned along one of the easy axis and the hard axis, and a write conductor positioned at a non-parallel and non-perpendicular angle to both of the easy axis and the hard axis.

Abstract: A magnetic random access memory (MRAM) comprises an array of magnetic memory cells arranged on a cross-point grid. Spurious voltages that build up on the stray wiring capacitance of unselected bit and word select lines are limited and discharged by diodes. The control of such spurious voltages improves device operating margins and allows the construction of larger arrays.

Abstract: Disclosed herein are systems and apparatuses having memories with a multiple buffer memory interface. In one embodiment, an integrated memory device comprises: a memory array integrated on a substrate, and a multiple buffer memory interface integrated on the same substrate. The memory interface comprises multiple read buffers each associated with a different region of the memory array and configured to buffer only data for read operations on the associated region.