Abstract: A digital circuit apparatus and method for cryptographic data processing includes steps and means for determining a first modulus having up to a first number of binary digits. A large integer is received which has up to a second number of binary digits that is greater than the first number of binary digits. The first modulus and the large integer are sent to a first processor for computing a first residue of the large integer modulo the first modulus. Before the first processor finishes computing the first residue, the first modulus is also sent to a second processor for computing a second residue of two raised to a power of twice the first number of binary digits modulo the first modulus. The first residue and the second residue are used as input to a third processor that computes a cryptographic result based on the large integer.

Abstract: Techniques for implementing a digital signature algorithm in electronic computer hardware include computing the multiplicative inverse of a particular integer modulo a prime modulus by computing a first quantity modulo the prime modulus. The first quantity substantially equals, modulo the prime modulus, the particular integer raised to a power of a second quantity. The second quantity is two less than the prime modulus. The techniques allow an integrated circuit block to compute a modulo multiplicative inverse, such as for signing and verifying digital signatures, using existing blocks of circuitry that consume considerably less area on a chip, and incur fewer developmental costs, than an implementation of an algorithm conventionally used in software.

Abstract: A method and apparatus for cryptographic data processing, includes determining a first modulus having up to a first number of binary digits. A large integer is received which has up to a second number of binary digits that is greater than the first number of binary digits. The first modulus and the large integer are sent to a first processor for computing a first residue of the large integer modulo the first modulus. Before the first processor finishes computing the first residue, the first modulus is also sent to a second processor for computing a second residue of two raised to a power of twice the first number of binary digits modulo the first modulus. The first residue and the second residue are used as input to a third processor that computes a cryptographic result based on the large integer.

Abstract: A pre-computation and dual-pass modular operation approach to implement encryption protocols efficiently in electronic integrated circuits is disclosed. An encrypted electronic message is received and another electronic message generated based on the encryption protocol. Two passes of Montgomery's method are used for a modular operation that is associated with the encryption protocol along with pre-computation of a constant based on a modulus. The modular operation may be a modular multiplication or a modular exponentiation. Modular arithmetic may be performed using the residue number system (RNS) and two RNS bases with conversions between the two RNS bases. A minimal number of register files are used for the computations along with an array of multiplier circuits and an array of modular reduction circuits. The approach described allows for high throughput for large encryption keys with a relatively small number of logical gates.

Abstract: A pre-computation and dual-pass modular operation approach to implement encryption protocols efficiently in electronic integrated circuits is disclosed. An encrypted electronic message is received and another electronic message generated based on the encryption protocol. Two passes of Montgomery's method are used for a modular operation that is associated with the encryption protocol along with pre-computation of a constant based on a modulus. The modular operation may be a modular multiplication or a modular exponentiation. Modular arithmetic may be performed using the residue number system (RNS) and two RNS bases with conversions between the two RNS bases. A minimal number of register files are used for the computations along with an array of multiplier circuits and an array of modular reduction circuits. The approach described allows for high throughput for large encryption keys with a relatively small number of logical gates.