Abstract: Disclosed is a method and apparatus for converting interlaced input video to a sequential output compatible with sequential input display devices. The video input is digitized and decoded so as to provide separate luminance or chrominance information for each pixel to a line buffer memory. A line derived frequency reference from the input video serves to reference a pixel clock which clocks pixel information into the memory and clocks pixel information out of the memory at twice the pixel clock rate. The decoder also digitizes the luminance/chrominance information prior to storage in the memory and, as this information is read out of the memory, it is converted back into analog data by a suitable D-A converter and then is converted into appropriate format to provide red, green and blue video output information for operating sequential input devices.