Abstract: Aspects of a method and system for network resource allocation based on a usage pattern may comprise a management entity that coordinates operation of one or more endpoint devices. The management entity may be operable to receive a usage pattern associated with each of the one or more endpoint devices. The management entity may be operable to determine resource allocation information for each of the one or more endpoint devices based on the received usage pattern associated with each of the one or more endpoint devices.

Abstract: A virtual machine running on an endpoint device may encode a mark comprising routing parameters within one or more packets of a packet stream to indicate services and/or costs to be utilized in processing and/or communicating the packet stream. The virtual machine may communicate the packet stream to another network device. The routing parameters within the marks may indicate device capabilities, service class, quality measurements, latency and/or power usage. The routing parameters may comprise costs that may indicate capacity, efficiency and/or performance of power usage, bandwidth, absolute and/or relative latency, frame-drop eligibility, memory and processing. The packet stream is received and inspected to identify the marks and/or routing parameters. A virtual machine may be initialized and/or configured to process and/or communicate the packet stream based on the routing parameters. Routing may utilize based SPB, TRILL, and/or AVB.

Abstract: Link partners coupled via an Ethernet link comprise memory buffers and/or PHY devices and the memory buffers may be operable to buffer packets that are pending delivery via the PHY devices. Latency requirements may be determined by inspecting OSI layer 2 or higher OSI layer information. Markings within packets may be inspected for latency requirements. An order of communicating buffered packets may be determined based on latency requirements. Corresponding packet headers may be ordered based on the latency requirements. Packet delivery may be scheduled based on the latency requirements. A specified time and/or a specified quantity of buffered data, which may be statically or dynamically programmable and/or configurable, may trigger determination of latency requirements. Packets may be delivered after an indication that prior packets have been delivered. Latency requirements may depend on a device that may generate and/or render the packets.

Abstract: Communication devices may determine routes for packets based on packet marking, routing parameters and/or costs associated with routes. A route may be selected and the packets may be communicated via the selected route. The parameters may comprise service class, real time compression, packet preemption, quality measurements, tier bypass and/or power usage information. The costs may comprise capacity, efficiency and/or performance information for power usage, bandwidth, memory and/or processing. The marking may comprise traffic type, user device capabilities, service class, quality measurements, latency requirements and/or power usage information. Endpoint devices, software applications and/or service providers may insert the marking into packets. Routes may be determined and/or selected based on shortest path bridging, audio video bridging, the marking, the routing parameters and/or the costs. Parameters and/or costs may be received and/or discovered from communication devices.

Abstract: Aspects of the invention provide a method and system for securely managing the storage and retrieval of data. Securely managing the storage and retrieval of data may include receiving a first disaster recovery code and acquiring a first password corresponding to the first disaster recovery code. A first disaster recovery key may be generated based on the first disaster recovery code and the first password. Another aspect of the invention may also include generating the received first disaster recovery code based on said first password and the first disaster recovery key. The generated disaster recovery code may be securely stored on at least a portion of a storage device or a removable media. Data stored on the storage device may be encrypted using the first generated disaster recovery key. Additionally, data read from the storage device may be decrypted using the generated first disaster recovery key.

Abstract: Aspects of a method and system for operating and/or charging a battery powered USB device based on a USB port type are provided. In this regard, in a USB device comprising a power management IC and a multi-function IC, a port type detection module in the multi-function IC may determine whether the USB device is attached to a standard host port or a charging port. Additionally, a power source in the power management IC, which may supply power to the port type detection module, may be enabled upon attachment of the USB device to a USB port and disabled subsequent to determination of port type. Also, one or more portions and/or functions of the power management IC may be configured based on the determined port type. Similarly, one or more portions and/or functions of the multi-function IC may be enabled or disabled based on the determined port type.

Abstract: A method and apparatus are disclosed for performing adaptive memory power management in a system employing a CPU and a memory subsystem. A CPU throttle control (THR) module generates a CPU throttle control signal indicating when the CPU is idle. A memory controller (MC) module generates memory power management signals based on at least one of the CPU throttle control signal, memory read/write signals, memory access break events, and bus master access requests. Certain portions of the memory subsystem are powered down in response to the memory power management signals. Memory power management is performed on a time segment by time segment basis to achieve efficient power management of the memory subsystem during CPU run time.

Abstract: Herein described is a method and system of prioritizing access to data stored in one or more data processing devices communicatively coupled to the data storage device. The method may be based on the type of data file accessed. Prioritization may be based on data pool or share names. Further, one or more data ports of the data storage device may be used to prioritize access to one or more data files stored in the data storage device. The system may comprise a storage device, one or more data processing devices requesting data file access from the data storage device, a software resident in a memory of the data storage device, a processor executing the software, and a display.

Abstract: A method and apparatus are disclosed for performing adaptive run-time power management in a system employing a CPU and an operating system. A CPU cycle tracker (CCT) module monitors critical CPU signals and generates CPU performance data based on the critical CPU signals. An adaptive CPU throttler (THR) module uses the CPU performance data, along with a CPU percent idle value fed back from the operating system, to generate a CPU throttle control signal during predefined run-time segments of the CPU run time. The CPU throttle control signal links back to the CPU and adaptively adjusts CPU throttling and, therefore, power usage of the CPU during each of the run-time segments.

Abstract: A method and apparatus are disclosed for performing dynamic arbitration of memory accesses by a CPU and at least one bus master interface module based on, at least in part, monitoring a CPU throttle control signal and monitoring CPU power and performance states, and making decisions based on the monitored parameters. Bus master memory access break events and memory read and write accesses are also monitored as part of the arbitration process in accordance with certain embodiments of the present invention. An arbitration (ARB) module performs the dynamic arbitration. A CPU throttle control module generates the CPU throttle control signal, indicating when the CPU is idle, and also monitors and outputs the CPU power and performance states. A memory controller (MC) module controls accesses to the memory subsystem based on, at least in part, the dynamic arbitration performed by the dynamic arbitration module.

Abstract: A method and apparatus are disclosed for performing adaptive memory power management in a system employing a CPU and a memory subsystem. A CPU throttle control (THR) module generates a CPU throttle control signal indicating when the CPU is idle. A memory controller (MC) module generates memory power management signals based on at least one of the CPU throttle control signal, memory read/write signals, memory access break events, and bus master access requests. Certain portions of the memory subsystem are powered down in response to the memory power management signals. Memory power management is performed on a time segment by time segment basis to achieve efficient power management of the memory subsystem during CPU run time.

Abstract: Aspects of the invention provide a method and system for securely managing the storage and retrieval of data. Securely managing the storage and retrieval of data may include receiving a first disaster recovery code and acquiring a first password corresponding to the first disaster recovery code. A first disaster recovery key may be generated based on the first disaster recovery code and the first password. Another aspect of the invention may also include generating the received first disaster recovery code based on said first password and the first disaster recovery key. The generated disaster recovery code may be securely stored on at least a portion of a storage device or a removable media. Data stored on the storage device may be encrypted using the first generated disaster recovery key. Additionally, data read from the storage device may be decrypted using the generated first disaster recovery key.

Abstract: Aspects of the invention provide a method and system for securely managing the storage and retrieval of data. Securely managing the storage and retrieval of data may include receiving a first disaster recovery code and acquiring a first password corresponding to the first disaster recovery code. A first disaster recovery key may be generated based on the first disaster recovery code and the first password. Another aspect of the invention may also include generating the received first disaster recovery code based on said first password and the first disaster recovery key. The generated disaster recovery code may be securely stored on at least a portion of a storage device or a removable media. Data stored on the storage device may be encrypted using the first generated disaster recovery key. Additionally, data read from the storage device may be decrypted using the generated first disaster recovery key.

Abstract: In accordance with a method for wireless communication, in a coexistence system comprising a plurality of different wireless interface devices within a single integrated circuit, wherein each of the plurality of wireless interface devices utilizes a corresponding different wireless communication standard, and when one of the plurality of wireless interface devices is receiving or will receive a packet, communicating from the one of the plurality of wireless interface devices, an indication to at least one of a remaining one or remaining ones of the plurality of wireless interface devices, which enables the at least one of the remaining one or ones of the plurality of wireless interface devices to delay corresponding transmission based on the indication. The indication may include status information for the receiving of the packet by the one of the plurality of wireless interface devices.

Abstract: A method for use by one peer of peer wireless interfaces devices of a wireless communication device to cooperatively provide wireless communications in a multiple wireless communication environment with other peers of the peer wireless interface devices begins by initiating an atomic sequence of a plurality of atomic sequences. The processing continues by setting a priority level corresponding to the atomic sequence to produce a corresponding priority level. The processing continues by sensing priority level of at least one of the other peers to produce a sensed priority level. The processing continues by comparing the sensed priority level with the corresponding priority level. The processing then continues by performing at least a portion of the atomic sequence when the comparing of the sensed priority level with the corresponding priority level is favorable.

Abstract: A method and apparatus are disclosed for performing dynamic arbitration of memory accesses by a CPU and at least one bus master interface module based on, at least in part, monitoring a CPU throttle control signal and monitoring CPU power and performance states, and making decisions based on the monitored parameters. Bus master memory access break events and memory read and write accesses are also monitored as part of the arbitration process in accordance with certain embodiments of the present invention. An arbitration (ARB) module performs the dynamic arbitration. A CPU throttle control module generates the CPU throttle control signal, indicating when the CPU is idle, and also monitors and outputs the CPU power and performance states. A memory controller (MC) module controls accesses to the memory subsystem based on, at least in part, the dynamic arbitration performed by the dynamic arbitration module.

Abstract: A method and apparatus are disclosed for performing dynamic arbitration of memory accesses by a CPU and at least one bus master interface module based on, at least in part, monitoring a CPU throttle control signal and monitoring CPU power and performance states, and making decisions based on the monitored parameters. Bus master memory access break events and memory read and write accesses are also monitored as part of the arbitration process in accordance with certain embodiments of the present invention. An arbitration (ARB) module performs the dynamic arbitration. A CPU throttle control module generates the CPU throttle control signal, indicating when the CPU is idle, and also monitors and outputs the CPU power and performance states. A memory controller (MC) module controls accesses to the memory subsystem based on, at least in part, the dynamic arbitration performed by the dynamic arbitration module.

Abstract: Herein described is a system and method for providing automated setup and testing of DDNS services provided by a DDNS service provider. The method comprises using first graphical user interface to generate an account. Once an account is generated, the user may input his user identification and password information into one or more inputs fields provided by the first graphical user interface. After the user logs in, a second graphical user interface provides one or more input fields in which the user may create a DDNS service. Subsequently, the newly created service is tested and a confirmation is provided to the user. The system comprises a data storage device used for storing a software used to generate the first and second graphical user interfaces. The system further comprises a processor used for executing the software.

Abstract: One or more methods and systems of providing a conditioned power source to an external card that is communicatively connected to a host computing device by way of an external card adaptor are presented. The system and method facilitates the use of an external card having a connector that is incompatible with a PC card connector provided by the host computing device. In one or more embodiments, the external card adaptor performs power conditioning and/or voltage conversions of one or more power signal inputs provided by the host computing device. The power conditioning is performed using a power conditioning circuitry while the voltage conversions are performed using a voltage conversion circuitry.

Abstract: In embodiments of the invention, selected aspects of a process' call stacks are hashed, and the hash is used to capture the execution state of the process in a concise form and with minimal impact on the performance of the process and with no modification to the process code. The hash allows vendors and developers to classify failures in order to associate them with their known root causes to support rapid customer feedback and to maximize efficiency of correction. Further, the hash provides a metric usable to prioritize diagnosis of failures. In an embodiment of the invention, the identities of modules on the call stack are hashed in combination with some but not all offset information to minimize the affect of patches and minor changes to the code, and improve the ability to discriminate different execution paths.