Abstract: A master-slave switch method for reversing roles between nodes in a network environment when the traditional role reversal functionality as defined by the network specification is not implemented within the node is presented. A data terminal which does not support the traditional master-slave switch functionality, progresses as far as establishing an asynchronous connectionless (ACL) connection. The LAN access point then request a role switch, when the reversal of roles fails, the connection is aborted with device addresses of the participating entities being stored. The LAN access point then initiates the reestablishment of the connection in a master role with the data terminal assuming a slave role after verification of the device address of the LAN access point.

Abstract: An adapter mechanism for facilitating re-orientation of a plug having an original orientation that is unsuitable for a peripheral device is presented. Re-orientation of a peripheral device is possible in an embodiment by advancing a symmetrical interface to another mating position exhibiting a hospitable orientation. An adaptor maintains USB functionality while providing the ability to reorient a fixedly attached peripheral. The adaptor mechanism also allows a USB wireless peripheral device with an antenna to plug directly into the USB receptacle connector on a digital device while orienting the antenna upwards to improve the quality of the transmitted and received signals.

Abstract: A communication system embodying the invention has a communication channel with at least two ends, one end of the channel being connected to a transmission device with relatively limited computational capacity and an other end of the channel being connected to a computer having relatively large computational capacity. The transmission device includes a signal source node; a set of M−1 delay buffers connected in series and defining a set of M progressively delayed signal nodes, M being a positive integer, one end of the series of M delay buffers being connected to the signal source node; a set of M parallel downsampling operators connected to the M progressively delayed signal nodes; and, a parallel-to-serial converter having M parallel inputs and a single serial output, the M parallel inputs being connected to the outputs of the M parallel downsampling operators and the single serial output being coupled to the one end of the communication channel.

Abstract: Continuously variable slope delta modulation coding uses a thresholder having an analog input and a digital output representing the relationship between a signal amplitude at the analog input and a predetermined threshold. An integrator has an output and one input connected to the output of the thresholder and a second input that receives a step size value, the output of the integrator corresponding to a product of the thresholder output and the step size value. An adder has one input that receives an analog input signal that is to be encoded and a second input connected to the output of the integrator. The output of the adder is coupled to the analog input of the thresholder. A step size controller is responsive to an analog signal level related to the analog input signal for varying the step size value in response to variations in the analog signal level.

Abstract: A master-slave switch method for reversing roles between nodes in a network environment when the traditional role reversal functionality as defined by the network specification is not implemented within the node is presented. A data terminal which does not support the traditional master-slave switch functionality, progresses as far as establishing an asynchronous connectionless (ACL) connection. The LAN access point then request a role switch, when the reversal of roles fails, the connection is aborted with device addresses of the participating entities being stored. The LAN access point then initiates the reestablishment of the connection in a master role with the data terminal assuming a slave role after verification of the device address of the LAN access point.

Abstract: A method and architecture for implementing link level security to enforce access privileges between a calling modem and an answering modem over a communication channel during a communication session in a modem employing a communication protocol capable of modulation modification. Security scramblers different from the standard scrambler inherent in the communication protocol are loaded into a calling modem and an answering modem. A password may alternatively be entered into the calling modem for verification prior to the enablement of the security process. During the training phase of the communication protocol, descriptors designating specific secure scramblers are passed from the calling modem to the answering modem for verification of the correct access privileges by the calling modem. The answering modem thereafter directs the calling modem to utilize yet another secure scrambler for the subsequent training and exchange of data.

Abstract: High speed computing apparatus for performing real time data compression of analog voice data or digital data to be transmitted over a data link. The incoming data stream is divided into blocks of digital data and the blocks are subdivided into digital samples or elements to be compressed. Each sample is analyzed individually to determine its estimated variance and the marginal return to be gained by alloting the sample one or more of the bits to be employed to define the block of digital data. The bits are assigned samples having the highest estimated variance factor so that an optimum allocation of bits to individual samples is achieved with variable ratio data compression. The allocated bits are employed to encode the samples during real time data compression and transmission.

Abstract: A method and apparatus for performing high speed graphics fill is provided. Any closed line geometric shape or polygon that can be defined by pixel position is stored in memory. The memory pixel positions are stored in address locations corresponding to row and column positions. A first sequential examination of the data is made in reverse raster scan order to make a preliminary determination of the pixel positions inside the closed polygon. A second sequential examination of the data is made in forward or regular raster scan order and a final determination is made whether the pixel positions are inside the polygon and shall be filled. The final determination of pixel positions to be filled is stored shortly before the graphics fill operation is performed so that the fill operation is performed in raster scan time at high speed.

Abstract: A video display control circuit, for an intelligent terminal, includes a large cost efficient Random-Access Memory (RAM). A portion of the RAM memory is utilized as a high speed character generator instead of employing a dedicated Read Only Memory (ROM). Novel timing and memory control circuits are provided which permit characters to be generated witout any delay or change of real character timing. The characters in RAM may be modified or changed which is not possible with dedicated Read Only Memories.