Abstract: During the growth of an oxide on the surface of a P-type silicon semiconductor wafer, thermal oxidation of the semiconductor surface produces an N-channel region near the silicon/silicon dioxide interface by the conductivity inversion behavior, thereby establishing a PN junction barrier therebetween. By a photo-lithographic etching process, a heavily doped P-type diffusion region (that is, P.sup.+ region) operatively associated with the P-type semiconductor wafer, is disposed at the peripheral portion of the semiconductor wafer to surround the PN junction barrier and shield the same against the outside ambient atmosphere. Besides, a heavily doped N-type diffusion region (N.sup.+ region) is made up inside of the heavily doped P-type region in a manner to describe a closed loop. An electrode assembly includes metal contact layers having extensions over a dioxide which has been disposed between the P.sup.+ region and the N.sup.