Patents by Inventor Kenta Ogawa
Kenta Ogawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240042321Abstract: A non-transitory computer readable storage medium according to the present invention stores a computer program causing a control unit of a game device, which provides a soccer game that includes a normal shot that follows a rule that the movement speed and climb angle of a ball increase according to the duration of an operation of a left operation button of a controller, to function as the following device. That is, the computer program causes the control unit to function as a device that, when an R2 button of the controller has been pressed, decides, according to the duration of the operation of the left operation button, the movement speed and climb angle of the ball in accordance with a rule which differs from that of the normal shot, and controlling display so that the ball moves at the decided movement speed and the like, as a power shot of a kind similar to the normal shot.Type: ApplicationFiled: October 20, 2023Publication date: February 8, 2024Applicant: Konami Digital Entertainment Co., Ltd.Inventors: Masatoshi OJIMA, Yuji Fujishiro, Shota Kobayashi, Yugo Kishino, Junichi Taya, Kenta Ogawa, Hideto Nishiyama, Shuto Aoyagi
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Publication number: 20230286621Abstract: A ship state including a rudder angle is estimated with high accuracy. A ship state estimator device is equipped with processing circuitry. The processing circuitry acquires an direction signal indicating an direction of a ship. The processing circuitry inputs the direction signal into a ship state estimator that outputs a ship state including a rudder angle, and estimates the ship state including the rudder angle.Type: ApplicationFiled: February 24, 2023Publication date: September 14, 2023Applicant: FURUNO ELECTRIC CO., LTD.Inventor: Kenta OGAWA
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Patent number: 11473914Abstract: A navigation device is provided, which may include an acquiring module and a route creating module. The acquiring module may acquire at least a departing location, a destination location and nautical chart information to be used for creating a traveling route for a ship. When a given navigable area is divided into a first navigable area and a second navigable area based on a given condition, the route creating module may create a route being shorter in total distance and taking priority in passing the first navigable area than the second navigable area, based on the departing location, the destination location, and the nautical chart information.Type: GrantFiled: July 10, 2019Date of Patent: October 18, 2022Assignee: FURUNO ELECTRIC CO., LTD.Inventors: Jun Yamabayashi, Kenta Ogawa
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Patent number: 11266904Abstract: At least one memory device of a game system stores a plurality of instructions, which, when executed by at least one processor, cause the at least one processor to: set, on a touch panel, a reception area for receiving a direction designation operation; move, in accordance with a movement of a touch position on the touch panel, an operation position in a direction corresponding to a moving direction of the touch position by a distance longer than a moving distance of the touch position; acquire a designated direction based on a direction from a reference position corresponding to the reception area to the operation position; and execute game processing based on the designated direction.Type: GrantFiled: September 26, 2019Date of Patent: March 8, 2022Assignee: KONAMI DIGITAL ENTERTAINMENT CO., LTD.Inventors: Masaki Nakamura, Yugo Kishino, Yuji Fujishiro, Kenta Ogawa, Hideki Yanagihara, Kei Masuda, Junichi Taya, Hideto Nishiyama, Taku Hamasaki
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Patent number: 11193787Abstract: A graph generating device is provided, which may include an interface (an obstacle data acquiring module) and processing circuitry (a first graph generating module, a second graph generating module, and a graph synthesizing module). The interface (the obstacle data acquiring module) may acquire obstacle data including information on an obstacle. The processing circuitry is configured to generate a first graph having an area including the obstacle that is recursively divided with a quadtree splitting method into cells that are exclusive of the obstacle, the first graph has a first vertex set in each cell and adjacent first vertexes being interconnected, to generate a second graph that includes second vertexes interconnected by a different method from the quadtree splitting method, and to generate a combined graph from the first graph and the second graph.Type: GrantFiled: July 10, 2019Date of Patent: December 7, 2021Assignee: FURUNO ELECTRIC CO., LTD.Inventor: Kenta Ogawa
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Patent number: 10857461Abstract: At least one processor of a game control device is configured to: acquire a movement direction of the touch position, when a touch position moves under a state in which a touch panel is being touched; execute first game processing based on the movement direction; detect that the movement direction has changed to any movement direction having an angle of a predetermined angle or more with respect to a movement direction acquired at a predetermined timing; and execute second game processing based on one of the movement direction before the change and the movement direction after the change, when the change in the movement direction is detected.Type: GrantFiled: May 15, 2019Date of Patent: December 8, 2020Assignee: KONAMI DIGITAL ENTERTAINMENT CO., LTD.Inventors: Masaki Nakamura, Yuji Fujishiro, Kenta Ogawa, Yugo Kishino, Kei Masuda, Junichi Taya, Hideto Nishiyama, Taku Hamasaki
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Patent number: 10773154Abstract: At least one processor of a game control device is configured to: display an object on a display region, in a game in which the object is moved in accordance with an operation of a user on a touch panel; set a first region of the display region as an operation region; move the object based on the operation of the user on the operation region; and change the operation region to a second region, in which the object is prevented from being arranged at an edge portion of the second region, in a predetermined game situation, which is one of a situation in which at least a part of the object is outside the first region and a situation in which the object is arranged at an edge portion of the first region.Type: GrantFiled: May 15, 2019Date of Patent: September 15, 2020Assignee: KONAMI DIGITAL ENTERTAINMENT CO., LTD.Inventors: Masaki Nakamura, Yuji Fujishiro, Kenta Ogawa, Yugo Kishino, Kei Masuda, Junichi Taya, Hideto Nishiyama, Taku Hamasaki
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Publication number: 20200038746Abstract: At least one memory device of a game system stores a plurality of instructions, which, when executed by at least one processor, cause the at least one processor to: set, on a touch panel, a reception area for receiving a direction designation operation; move, in accordance with a movement of a touch position on the touch panel, an operation position in a direction corresponding to a moving direction of the touch position by a distance longer than a moving distance of the touch position; acquire a designated direction based on a direction from a reference position corresponding to the reception area to the operation position; and execute game processing based on the designated direction.Type: ApplicationFiled: September 26, 2019Publication date: February 6, 2020Inventors: Masaki NAKAMURA, Yugo KISHINO, Yuji FUJISHIRO, Kenta OGAWA, Hideki YANAGIHARA, Kei MASUDA, Junichi TAYA, Hideto NISHIYAMA, Taku HAMASAKI
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Publication number: 20200018601Abstract: A navigation device is provided, which may include an acquiring module and a route creating module. The acquiring module may acquire at least a departing location, a destination location and nautical chart information to be used for creating a traveling route for a ship. When a given navigable area is divided into a first navigable area and a second navigable area based on a given condition, the route creating module may create a route being shorter in total distance and taking priority in passing the first navigable area than the second navigable area, based on the departing location, the destination location, and the nautical chart information.Type: ApplicationFiled: July 10, 2019Publication date: January 16, 2020Applicant: Furuno Electric Co., Ltd.Inventors: Jun YAMABAYASHI, Kenta OGAWA
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Publication number: 20200018615Abstract: A graph generating device is provided, which may include an interface (an obstacle data acquiring module) and processing circuitry (a first graph generating module, a second graph generating module, and a graph synthesizing module). The interface (the obstacle data acquiring module) may acquire obstacle data including information on an obstacle. The processing circuitry is configured to generate a first graph having an area including the obstacle that is recursively divided with a quadtree splitting method into cells that are exclusive of the obstacle, the first graph has a first vertex set in each cell and adjacent first vertexes being interconnected, to generate a second graph that includes second vertexes interconnected by a different method from the quadtree splitting method, and to generate a combined graph from the first graph and the second graph.Type: ApplicationFiled: July 10, 2019Publication date: January 16, 2020Applicant: Furuno Electric Co., Ltd.Inventor: Kenta OGAWA
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Publication number: 20190262700Abstract: At least one processor of a game control device is configured to: display an object on a display region, in a game in which the object is moved in accordance with an operation of a user on a touch panel; set a first region of the display region as an operation region; move the object based on the operation of the user on the operation region; and change the operation region to a second region, in which the object is prevented from being arranged at an edge portion of the second region, in a predetermined game situation, which is one of a situation in which at least a part of the object is outside the first region and a situation in which the object is arranged at an edge portion of the first region.Type: ApplicationFiled: May 15, 2019Publication date: August 29, 2019Inventors: Masaki NAKAMURA, Yuji FUJISHIRO, Kenta OGAWA, Yugo KISHINO, Kei MASUDA, Junichi TAYA, Hideto NISHIYAMA, Taku HAMASAKI
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Publication number: 20190262709Abstract: At least one processor of a game control device is configured to: acquire a movement direction of the touch position, when a touch position moves under a state in which a touch panel is being touched; execute first game processing based on the movement direction; detect that the movement direction has changed to any movement direction having an angle of a predetermined angle or more with respect to a movement direction acquired at a predetermined timing; and execute second game processing based on one of the movement direction before the change and the movement direction after the change, when the change in the movement direction is detected.Type: ApplicationFiled: May 15, 2019Publication date: August 29, 2019Inventors: Masaki NAKAMURA, Yuji FUJISHIRO, Kenta OGAWA, Yugo KISHINO, Kei MASUDA, Junichi TAYA, Hideto NISHIYAMA, Taku HAMASAKI
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Patent number: 9666659Abstract: An external storage device including an interconnect substrate having a contact type external terminal, at least one semiconductor chip disposed over a first surface of the interconnect substrate, and a sealing resin layer which seals the at least one semiconductor chip and does not cover the external terminal. The at least one semiconductor chip includes a storage device, an inductor being connected to the storage device, a driver circuit configured to control the inductor and an interconnect layer. The interconnect layer is formed at a first surface of the semiconductor chip and includes the inductor. The first surface of the semiconductor chip is other than facing the first surface of the interconnect substrate, and the inductor and the driver circuit are connected to each other through the interconnect layer.Type: GrantFiled: March 10, 2014Date of Patent: May 30, 2017Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Yasutaka Nakashiba, Kenta Ogawa
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Patent number: 9362263Abstract: This invention can reduce heat that is generated in a first semiconductor chip and transfers to a second semiconductor chip through through-silicon vias. The first semiconductor chip has the first through-silicon vias. Each of the first through-silicon vias is arranged on any of grid points arranged in m rows and n columns (m>n). The first semiconductor chip also has a first circuit formation area. A first circuit is formed in the first circuit formation area. The first circuit performs signal processing while communicating with the second semiconductor chip. In plan view, the first circuit formation area does not overlap with a through-silicon via area that is defined by coupling the outermost grid points arranged in m rows and n columns. In plan view, some of connection terminals are located between the first circuit formation area and the through-silicon via area.Type: GrantFiled: September 11, 2015Date of Patent: June 7, 2016Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Shintaro Yamamichi, Kenta Ogawa
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Publication number: 20160005727Abstract: This invention can reduce heat that is generated in a first semiconductor chip and transfers to a second semiconductor chip through through-silicon vias. The first semiconductor chip has the first through-silicon vias. Each of the first through-silicon vias is arranged on any of grid points arranged in m rows and n columns (m>n). The first semiconductor chip also has a first circuit formation area. A first circuit is formed in the first circuit formation area. The first circuit performs signal processing while communicating with the second semiconductor chip. In plan view, the first circuit formation area does not overlap with a through-silicon via area that is defined by coupling the outermost grid points arranged in m rows and n columns. In plan view, some of connection terminals are located between the first circuit formation area and the through-silicon via area.Type: ApplicationFiled: September 11, 2015Publication date: January 7, 2016Inventors: Shintaro YAMAMACHI, Kenta OGAWA
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Patent number: 9165879Abstract: This invention can reduce heat that is generated in a first semiconductor chip and transfers, to a second semiconductor chip through through-silicon vias. The first semiconductor chip has the first through-silicon vias. Each of the first through-silicon vias is arranged on any of grid points arranged in m rows and n columns (m>n). The first semiconductor chip also has a first circuit formation area. A first circuit is formed in the first circuit formation area. The first circuit performs signal processing while communicating with the second semiconductor chip. In plan view, the first circuit formation area does not overlap with a through-silicon via area that is defined by coupling the outermost grid points arranged in m rows and n columns. In plan view, some of connection terminals are located between the first circuit formation area and the through-silicon via area.Type: GrantFiled: May 22, 2014Date of Patent: October 20, 2015Assignee: Renesas Electronics CorporationInventors: Shintaro Yamamichi, Kenta Ogawa
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Publication number: 20140361411Abstract: This invention can reduce heat that is generated in a first semiconductor chip and transfers, to a second semiconductor chip through through-silicon vias. The first semiconductor chip has the first through-silicon vias. Each of the first through-silicon vias is arranged on any of grid points arranged in m rows and n columns (m>n). The first semiconductor chip also has a first circuit formation area. A first circuit is formed in the first circuit formation area. The first circuit performs signal processing while communicating with the second semiconductor chip. In plan view, the first circuit formation area does not overlap with a through-silicon via area that is defined by coupling the outermost grid points arranged in m rows and n columns. In plan view, some of connection terminals are located between the first circuit formation area and the through-silicon via area.Type: ApplicationFiled: May 22, 2014Publication date: December 11, 2014Applicant: Renesas Electronics CorporationInventors: Shintaro Yamamichi, Kenta Ogawa
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Patent number: 8810021Abstract: A semiconductor device, includes a substrate with a first surface, a semiconductor chip disposed over the first surface of the substrate, the semiconductor chip including a first region and a second region, and an encapsulant resin formed over the first surface of the substrate and encapsulating the semiconductor chip. The encapsulant resin has a thickness that is less at the first region of the semiconductor chip than that at the second region.Type: GrantFiled: September 15, 2012Date of Patent: August 19, 2014Assignee: Renesas Electronics CorporationInventors: Yasutaka Nakashiba, Kenta Ogawa
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Publication number: 20140191363Abstract: An external storage device including an interconnect substrate having a contact type external terminal, at least one semiconductor chip disposed over a first surface of the interconnect substrate, and a sealing resin layer which seals the at least one semiconductor chip and does not cover the external terminal. The at least one semiconductor chip includes a storage device, an inductor being connected to the storage device, a driver circuit configured to control the inductor and an interconnect layer. The interconnect layer is formed at a first surface of the semiconductor chip and includes the inductor. The first surface of the semiconductor chip is other than facing the first surface of the interconnect substrate, and the inductor and the driver circuit are connected to each other through the interconnect layer.Type: ApplicationFiled: March 10, 2014Publication date: July 10, 2014Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Yasutaka Nakashiba, Kenta Ogawa
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Patent number: RE45987Abstract: An external terminal of an electronic component is provided with a lead base material and a metal thin film coating a surface of the lead base material, and an average value of a crystal size index is not less than 7, which is defined based on dimensions of a crystal particle in a direction perpendicular to the lead base material surface and in a direction parallel thereto, taken on a cut surface of the metal thin film defined by a given plane cutting the metal thin film in a direction perpendicular to the lead base material surface. Such constitution provides an electronic component having an external terminal coated with a metal thin film of a simple structure constituted of Sn or a Sn-based and substantially Pb-free alloy, formed by plating on a surface of a lead base material.Type: GrantFiled: August 30, 2013Date of Patent: April 26, 2016Assignee: RENESAS ELECTRONICS COPORATIONInventor: Kenta Ogawa