Abstract: A parylene deposition apparatus includes a quartz crystal thickness/rate controller for controlling the deposition of Parylene AF4 onto silicon wafers in the production of semiconductor chips. The crystal is located within the deposition chamber to receive a coating of parylene consistent with that of the substrate being coated. The vaporization chamber of the apparatus includes a heat transfer receptacle for receiving parylene dimer to be vaporized. The heat transfer receptacle includes heating and cooling devices to control the temperature thereof. In operation, parylene monomer deposits onto the surface of the crystal during deposition thereby varying the vibration frequency of the crystal. The rate of change in frequency can be directly correlated with the rate of monomer deposition.