Patents by Inventor Kerry Dean Tedrow
Kerry Dean Tedrow has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10942873Abstract: In one embodiment, an apparatus, such as a memory device, is disclosed. The apparatus includes multiple memory tiles and selection circuitry. Each memory tile has an array of storage components at intersections of a plurality of digit line conductors and a plurality of access line conductors. The selection circuitry includes line drivers that select a storage component of a memory tile based on a corresponding digit line conductor and a corresponding access line conductor to the storage component. The selection circuitry may select two or more storage components of a memory tile in a consecutive manner before selecting the storage components of a different memory tile.Type: GrantFiled: July 9, 2019Date of Patent: March 9, 2021Assignee: Micron Technology, Inc.Inventors: Hernan A. Castro, Kerry Dean Tedrow, Jack Chinho Wu
-
Publication number: 20200012606Abstract: In one embodiment, an apparatus, such as a memory device, is disclosed. The apparatus includes multiple memory tiles and selection circuitry. Each memory tile has an array of storage components at intersections of a plurality of digit line conductors and a plurality of access line conductors. The selection circuitry includes line drivers that select a storage component of a memory tile based on a corresponding digit line conductor and a corresponding access line conductor to the storage component. The selection circuitry may select two or more storage components of a memory tile in a consecutive manner before selecting the storage components of a different memory tile.Type: ApplicationFiled: July 9, 2019Publication date: January 9, 2020Inventors: Hernan A. Castro, Kerry Dean Tedrow, Jack Chinho Wu
-
Patent number: 10387338Abstract: In one embodiment, an apparatus, such as a memory device, is disclosed. The apparatus includes multiple memory tiles and selection circuitry. Each memory tile has an array of storage components at intersections of a plurality of digit line conductors and a plurality of access line conductors. The selection circuitry includes line drivers that select a storage component of a memory tile based on a corresponding digit line conductor and a corresponding access line conductor to the storage component. The selection circuitry may select two or more storage components of a memory tile in a consecutive manner before selecting the storage components of a different memory tile.Type: GrantFiled: March 27, 2018Date of Patent: August 20, 2019Assignee: Micron Technology, Inc.Inventors: Hernan A. Castro, Kerry Dean Tedrow, Jack Chinho Wu
-
Publication number: 20180285287Abstract: In one embodiment, an apparatus, such as a memory device, is disclosed. The apparatus includes multiple memory tiles and selection circuitry. Each memory tile has an array of storage components at intersections of a plurality of digit line conductors and a plurality of access line conductors. The selection circuitry includes line drivers that select a storage component of a memory tile based on a corresponding digit line conductor and a corresponding access line conductor to the storage component. The selection circuitry may select two or more storage components of a memory tile in a consecutive manner before selecting the storage components of a different memory tile.Type: ApplicationFiled: March 27, 2018Publication date: October 4, 2018Inventors: Hernan A. Castro, Kerry Dean Tedrow, Jack Chinho Wu
-
Patent number: 9959220Abstract: In one embodiment, an apparatus, such as a memory device, is disclosed. The apparatus includes multiple memory tiles and selection circuitry. Each memory tile has an array of storage components at intersections of a plurality of digit line conductors and a plurality of access line conductors. The selection circuitry includes line drivers that select a storage component of a memory tile based on a corresponding digit line conductor and a corresponding access line conductor to the storage component. The selection circuitry may select two or more storage components of a memory tile in a consecutive manner before selecting the storage components of a different memory tile.Type: GrantFiled: March 20, 2017Date of Patent: May 1, 2018Assignee: MICRON TECHNOLOGY, INCInventors: Hernan A. Castro, Kerry Dean Tedrow, Jack Chinho Wu
-
Publication number: 20170192911Abstract: In one embodiment, an apparatus, such as a memory device, is disclosed. The apparatus includes multiple memory tiles and selection circuitry. Each memory tile has an array of storage components at intersections of a plurality of digit line conductors and a plurality of access line conductors. The selection circuitry includes line drivers that select a storage component of a memory tile based on a corresponding digit line conductor and a corresponding access line conductor to the storage component. The selection circuitry may select two or more storage components of a memory tile in a consecutive manner before selecting the storage components of a different memory tile.Type: ApplicationFiled: March 20, 2017Publication date: July 6, 2017Inventors: Hernan A. Castro, Kerry Dean Tedrow, Jack Chinho Wu
-
Patent number: 9626292Abstract: In one embodiment, an apparatus, such as a memory device, is disclosed. The apparatus includes multiple memory tiles and selection circuitry. Each memory tile has an array of storage components at intersections of a plurality of digit line conductors and a plurality of access line conductors. The selection circuitry includes line drivers that select a storage component of a memory tile based on a corresponding digit line conductor and a corresponding access line conductor to the storage component. The selection circuitry may select two or more storage components of a memory tile in a consecutive manner before selecting the storage components of a different memory tile.Type: GrantFiled: June 27, 2016Date of Patent: April 18, 2017Assignee: MICRON TECHNOLOGY, INC.Inventors: Hernan A. Castro, Kerry Dean Tedrow, Jack Chinho Wu
-
Publication number: 20160306740Abstract: In one embodiment, an apparatus, such as a memory device, is disclosed. The apparatus includes multiple memory tiles and selection circuitry. Each memory tile has an array of storage components at intersections of a plurality of digit line conductors and a plurality of access line conductors. The selection circuitry includes line drivers that select a storage component of a memory tile based on a corresponding digit line conductor and a corresponding access line conductor to the storage component. The selection circuitry may select two or more storage components of a memory tile in a consecutive manner before selecting the storage components of a different memory tile.Type: ApplicationFiled: June 27, 2016Publication date: October 20, 2016Inventors: Hernan A. Castro, Kerry Dean Tedrow, Jack Chinho Wu
-
Patent number: 9437288Abstract: A Phase-Change Memory (PCM) includes a factory programming interface to receive data changing on both a positive transition and a negative transition of a dual edge clock. A transition detector generated internal clock provides a delayed edge to latch the program data. This dual-edge clock scheme provides a doubling in the data transfer rate.Type: GrantFiled: August 11, 2014Date of Patent: September 6, 2016Assignee: Micron Technology, Inc.Inventor: Kerry Dean Tedrow
-
Patent number: 9406362Abstract: In one embodiment, an apparatus, such as a memory device, is disclosed. The apparatus includes multiple memory tiles and selection circuitry. Each memory tile has an array of storage components at intersections of a plurality of digit line conductors and a plurality of access line conductors. The selection circuitry includes line drivers that select a storage component of a memory tile based on a corresponding digit line conductor and a corresponding access line conductor to the storage component. The selection circuitry may select two or more storage components of a memory tile in a consecutive manner before selecting the storage components of a different memory tile.Type: GrantFiled: June 17, 2013Date of Patent: August 2, 2016Assignee: MICRON TECHNOLOGY, INC.Inventors: Hernan A. Castro, Kerry Dean Tedrow, Jack Chinho Wu
-
Publication number: 20140372713Abstract: In one embodiment, an apparatus, such as a memory device, is disclosed. The apparatus includes multiple memory tiles and selection circuitry. Each memory tile has an array of storage components at intersections of a plurality of digit line conductors and a plurality of access line conductors. The selection circuitry includes line drivers that select a storage component of a memory tile based on a corresponding digit line conductor and a corresponding access line conductor to the storage component. The selection circuitry may select two or more storage components of a memory tile in a consecutive manner before selecting the storage components of a different memory tile.Type: ApplicationFiled: June 17, 2013Publication date: December 18, 2014Inventors: Hernan A. Castro, Kerry Dean Tedrow, Jack Chinho Wu
-
Publication number: 20140347920Abstract: A Phase-Change Memory (PCM) includes a factory programming interface to receive data changing on both a positive transition and a negative transition of a dual edge clock. A transition detector generated internal clock provides a delayed edge to latch the program data. This dual-edge clock scheme provides a doubling in the data transfer rate.Type: ApplicationFiled: August 11, 2014Publication date: November 27, 2014Inventor: Kerry Dean Tedrow
-
Patent number: 8804411Abstract: A Phase-Change Memory (PCM) includes a factory programming interface to receive data changing on both a positive transition and a negative transition of a dual edge clock. A transition detector generated internal clock provides a delayed edge to latch the program data. This dual-edge clock scheme provides a doubling in the data transfer rate.Type: GrantFiled: September 11, 2009Date of Patent: August 12, 2014Assignee: Micron Technology, IncInventor: Kerry Dean Tedrow
-
Patent number: 8259488Abstract: A Phase-Change Memory (PCM) having a temperature detector with a dedicated PCM bit programmed to an amorphous state and a circuit to determine that the dedicated PCM bit is no longer in the amorphous state. A temperature exposure signal is asserted to indicate that a high temperature has altered PCM device programming integrity.Type: GrantFiled: May 11, 2009Date of Patent: September 4, 2012Assignee: Micron Technology, Inc.Inventors: Kerry Dean Tedrow, Jahanshir Javanifard
-
Patent number: 8176232Abstract: A nonvolatile memory device has a dedicated serial programming port to provide a data path to memory storage. A dedicated power pin supplies power for the programming port to receive data and provide storage in the nonvolatile memory while a power pin for normal device operation is not powered.Type: GrantFiled: May 11, 2009Date of Patent: May 8, 2012Assignee: Micron Technology, Inc.Inventors: Kerry Dean Tedrow, Nicholas Hendrickson
-
Publication number: 20100287435Abstract: A nonvolatile memory device has a dedicated serial programming port to provide a data path to memory storage. A dedicated power pin supplies power for the programming port to receive data and provide storage in the nonvolatile memory while a power pin for normal device operation is not powered.Type: ApplicationFiled: May 11, 2009Publication date: November 11, 2010Inventors: Kerry Dean Tedrow, Nicholas Hendrickson