Abstract: A method of memory array testing that detects defects which are sensitive to environmental conditions. A repair signature is generated reflecting the repair state of the memory. A memory device is rejected if there is a change in the repair signature of the memory array over the operating range of the device. In one embodiment, an integrated circuit includes a memory array, spare memory elements for repairing defective locations of the memory array, a built-in self-test (BIST) circuit for detecting faults in the memory array, a built-in self-repair (BISR) circuit for causing the failed memory location of the memory array to be replaced with a spare memory element, and a signature generator where the signature is based on a compression of addresses corresponding to failed memory locations, wherein the signature is used to determine that a repair result of the memory array is invariant over different environmental conditions.