Abstract: A sensor device includes a sensor unit sensitive for a property of a gaseous medium. The sensor unit is formed on a first surface of a sensor substrate. A frame structure on the first surface includes a first loop portion laterally surrounding a first area that includes the sensor unit. A communicating channel accesses the first area through at least one of a lateral port in the first loop portion and a base port in the sensor substrate. A lid structure completely covers the frame structure and the first area.

Abstract: A sensor device includes a sensor unit sensitive for a property of a gaseous medium. The sensor unit is formed on a first surface of a sensor substrate. A frame structure on the first surface includes a first loop portion laterally surrounding a first area that includes the sensor unit. A communicating channel accesses the first area through at least one of a lateral port in the first loop portion and a base port in the sensor substrate. A lid structure completely covers the frame structure and the first area.

Abstract: An IR (infrared) radiation source includes a sealed cavity structure enclosing a vacuum chamber having a low atmospheric pressure, wherein the sealed cavity structure includes a thermally and electrically insulating material for enclosing the vacuum chamber, heating filaments extending in the vacuum chamber between opposing electrode regions at opposing wall regions of the vacuum chamber, wherein the heating filaments are electrically connected in parallel, and wherein the heating filaments and the electrode regions have a highly electrically conductive material, and an optical isolation structure adjacent to the vacuum chamber for optically confining the IR radiation and providing a predominant propagation direction of the IR radiation.

Abstract: A method for wafer bonding includes: providing a semiconductor wafer having a first main face; fabricating at least one semiconductor device in the semiconductor wafer, wherein the semiconductor device is arranged at the first main face; generating trenches and a cavity in the semiconductor wafer such that the at least one semiconductor device is connected to the rest of the semiconductor wafer by no more than at least one connecting pillar; arranging the semiconductor wafer on a carrier wafer such that the first main face faces the carrier wafer; attaching the at least one semiconductor device to the carrier wafer; and removing the at least one semiconductor device from the semiconductor wafer by breaking the at least one connecting pillar.

Abstract: A device for an image sensor is provided. The device includes a semiconductor device having a photo-sensitive region and a metallization stack for electrically contacting the photo-sensitive region. The photo-sensitive region is configured to generate an electric signal based on incident light. Further, the device includes an optical stack formed on a surface of the semiconductor device and configured to guide the incident light towards the photo-sensitive region. The optical stack includes a plurality of regions stacked on top of each other. The plurality of regions includes a filter region configured to selectively transmit the incident light only in a target wavelength range.

Abstract: A sensor device includes a sensor unit sensitive for a property of a gaseous medium. The sensor unit is formed on a first surface of a sensor substrate. A frame structure on the first surface includes a first loop portion laterally surrounding a first area that includes the sensor unit. A communicating channel accesses the first area through at least one of a lateral port in the first loop portion and a base port in the sensor substrate. A lid structure completely covers the frame structure and the first area.

Abstract: A sensor device includes a sensor unit sensitive for a property of a gaseous medium. The sensor unit is formed on a first surface of a sensor substrate. A frame structure on the first surface includes a first loop portion laterally surrounding a first area that includes the sensor unit. A communicating channel accesses the first area through at least one of a lateral port in the first loop portion and a base port in the sensor substrate. A lid structure completely covers the frame structure and the first area.

Abstract: In accordance with an embodiment, a method for producing a buried cavity structure includes providing a mono-crystalline semiconductor substrate, producing a doped volume region in the mono-crystalline semiconductor substrate, wherein the doped volume region has an increased etching rate for a first etchant by comparison with an adjoining, undoped or more lightly doped material of the monocrystalline semiconductor substrate, forming an access opening to the doped volume region, and removing the doped semiconductor material in the doped volume region using the first etchant through the access opening to obtain the buried cavity structure.

Abstract: A semiconductor device includes at least one suspension region of a membrane structure, where the suspension region lies laterally in a first region of a surface of a semiconductor substrate; and a membrane region of the membrane structure, where a cavity is arranged vertically between the membrane region and at least one part of the semiconductor substrate, and the first region of the surface of the semiconductor substrate is formed by a surface of a shielding doping region of the semiconductor substrate.

Abstract: Memory cells and corresponding memory arrays are provided. The memory cell comprises a fusable element and a bipolar transistor arranged adjacent to the fusable element.

Abstract: In accordance with an embodiment, a method for producing a buried cavity structure includes providing a mono-crystalline semiconductor substrate, producing a doped volume region in the mono-crystalline semiconductor substrate, wherein the doped volume region has an increased etching rate for a first etchant by comparison with an adjoining, undoped or more lightly doped material of the monocrystalline semiconductor substrate, forming an access opening to the doped volume region, and removing the doped semiconductor material in the doped volume region using the first etchant through the access opening to obtain the buried cavity structure.

Abstract: A semiconductor device includes at least one suspension region of a membrane structure, where the suspension region lies laterally in a first region of a surface of a semiconductor substrate; and a membrane region of the membrane structure, where a cavity is arranged vertically between the membrane region and at least one part of the semiconductor substrate, and the first region of the surface of the semiconductor substrate is formed by a surface of a shielding doping region of the semiconductor substrate.

Abstract: A sensor device includes a sensor unit sensitive for a property of a gaseous medium. The sensor unit is formed on a first surface of a sensor substrate. A frame structure on the first surface includes a first loop portion laterally surrounding a first area that includes the sensor unit. A communicating channel accesses the first area through at least one of a lateral port in the first loop portion and a base port in the sensor substrate. A lid structure completely covers the frame structure and the first area.

Abstract: One time programmable memory cell and memory array Memory cells and corresponding memory arrays are provided. The memory cell comprises a fusable element and a bipolar transistor arranged adjacent to the fusable element.

Abstract: According to various embodiments, a method for processing a carrier may include: doping a carrier with fluorine such that a first surface region of the carrier is fluorine doped and a second surface region of the carrier is at least one of free from the fluorine doping or less fluorine doped than the first surface region; and oxidizing the carrier to grow a first gate oxide layer from the first surface region of the carrier with a first thickness and simultaneously from the second surface region of the carrier with a second thickness different from the first thickness.

Abstract: According to various embodiments, a method for processing a carrier may include: doping a carrier with fluorine such that a first surface region of the carrier is fluorine doped and a second surface region of the carrier is at least one of free from the fluorine doping or less fluorine doped than the first surface region; and oxidizing the carrier to grow a first gate oxide layer from the first surface region of the carrier with a first thickness and simultaneously from the second surface region of the carrier with a second thickness different from the first thickness.

Abstract: According to various embodiments, a method for processing a carrier may include: doping a carrier with fluorine such that a first surface region of the carrier is fluorine doped and a second surface region of the carrier is at least one of free from the fluorine doping or less fluorine doped than the first surface region; and oxidizing the carrier to grow a first gate oxide layer from the first surface region of the carrier with a first thickness and simultaneously from the second surface region of the carrier with a second thickness different from the first thickness.

Abstract: According to various embodiments, a method for processing a carrier may include: doping a carrier with fluorine such that a first surface region of the carrier is fluorine doped and a second surface region of the carrier is at least one of free from the fluorine doping or less fluorine doped than the first surface region; and oxidizing the carrier to grow a first gate oxide layer from the first surface region of the carrier with a first thickness and simultaneously from the second surface region of the carrier with a second thickness different from the first thickness.

Abstract: According to various embodiments, a method for processing a carrier may include: doping a carrier with fluorine such that a first surface region of the carrier is fluorine doped and a second surface region of the carrier is at least one of free from the fluorine doping or less fluorine doped than the first surface region; and oxidizing the carrier to grow a first gate oxide layer from the first surface region of the carrier with a first thickness and simultaneously from the second surface region of the carrier with a second thickness different from the first thickness.

Abstract: A semiconductor device and a method of making a semiconductor device are disclosed. The method of manufacturing a semiconductor device comprises forming a material layer on a substrate, patterning a first semi-global region with a first main pattern and patterning a second semi-global region with a second main pattern, wherein the first main pattern is different than the second main pattern. The method further comprises introducing a first dummy pattern in the first semi-global region so that a first sidewall area surface density of the first main pattern and the first dummy pattern in the first semi-global region and a second sidewall area surface density of the second main pattern in the second semi-global region are substantially a same density.