Patents by Inventor Kevin Cadieux
Kevin Cadieux has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8160097Abstract: A mobile communications device includes one or more antennas and a plurality of wireless transceivers that are each configured to transmit and receive transmissions via the one or more antennas according to at least one of several associated communications protocols. The device includes a control processor operatively coupled to the transceivers and antenna(s), which is configured to select and utilize one or more of the wireless transceivers and associated communications protocols in order to transact particular transmissions, where the selection is based on characteristics of the particular transmissions, and to allocate bandwidth to multiple transmissions within a single communications protocol, where the allocation is based on characteristics of the transmissions. The device also includes a power source coupled to the transceivers and adapted to supply power to the transceivers.Type: GrantFiled: January 31, 2008Date of Patent: April 17, 2012Assignee: Broadcom CorporationInventor: Kevin Cadieux
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Publication number: 20090116431Abstract: A mobile communications device includes one or more antennas and a plurality of wireless transceivers that are each configured to transmit and receive transmissions via the one or more antennas according to at least one of several associated communications protocols. The device includes a control processor operatively coupled to the transceivers and antenna(s), which is configured to select and utilize one or more of the wireless transceivers and associated communications protocols in order to transact particular transmissions, where the selection is based on characteristics of the particular transmissions, and to allocate bandwidth to multiple transmissions within a single communications protocol, where the allocation is based on characteristics of the transmissions. The device also includes a power source coupled to the transceivers and adapted to supply power to the transceivers.Type: ApplicationFiled: January 31, 2008Publication date: May 7, 2009Applicant: Broadcom CorporationInventor: Kevin Cadieux
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Patent number: 7506148Abstract: A host-side wireless interface services communications between a wireless user input device and a serviced host. The host-side wireless interface includes a wireless network interface, a host interface, and may include additional components. The wireless network interface wirelessly communicates with the wireless user input device. The host interface communicatively couples to the wireless interface and to the serviced host. When the serviced host initiates bootstrap operations via a Basic Input/Output System (BIOS), the host interface operates in a BIOS host interface mode to allow input from the wireless user input device to the BIOS during the bootstrap operations. Further, when the serviced host initiates Operating System (OS) operations, the host interface operates in an OS host interface mode, wherein the OS host interface mode differs from the BIOS host interface mode.Type: GrantFiled: January 16, 2007Date of Patent: March 17, 2009Assignee: Broadcom CorporationInventors: Tong Zhang, Yuqian C. Wong, Robert W. Hulvey, Angel Polo, Kevin Cadieux
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Publication number: 20070150560Abstract: A host-side wireless interface services communications between a wireless user input device and a serviced host. The host-side wireless interface includes a wireless network interface, a host interface, and may include additional components. The wireless network interface wirelessly communicates with the wireless user input device. The host interface communicatively couples to the wireless interface and to the serviced host. When the serviced host initiates bootstrap operations via a Basic Input/Output System (BIOS), the host interface operates in a BIOS host interface mode to allow input from the wireless user input device to the BIOS during the bootstrap operations. Further, when the serviced host initiates Operating System (OS) operations, the host interface operates in an OS host interface mode, wherein the OS host interface mode differs from the BIOS host interface mode.Type: ApplicationFiled: January 16, 2007Publication date: June 28, 2007Applicant: BROADCOM CORPORATIONInventors: TONG ZHANG, YUQIAN WONG, ROBERT HULVEY, ANGEL POLO, KEVIN CADIEUX
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Patent number: 7165171Abstract: A host-side wireless interface services communications between a wireless user input device and a serviced host. The host-side wireless interface includes a wireless network interface, a host interface, and may include additional components. The wireless network interface wirelessly communicates with the wireless user input device. The host interface communicatively couples to the wireless interface and to the serviced host. When the serviced host initiates bootstrap operations via a Basic Input/Output System (BIOS), the host interface operates in a BIOS host interface mode to allow input from the wireless user input device to the BIOS during the bootstrap operations. Further, when the serviced host initiates Operating System (OS) operations, the host interface operates in an OS host interface mode, wherein the OS host interface mode differs from the BIOS host interface mode.Type: GrantFiled: September 30, 2003Date of Patent: January 16, 2007Assignee: Broadcom CorporationInventors: Tong Zhang, Yuqian C. Wong, Robert W. Hulvey, Angel Polo, Kevin Cadieux
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Publication number: 20060030307Abstract: A wireless interface device services communications between a wirelessly enabled host and at least one user input device. The wireless interface device includes a wireless interface unit, a processing unit, an input/output unit, and a power management unit. The wireless interface unit wirelessly interfaces with the wirelessly enabled host using a communication interface protocol. The power management unit operably couples to the wireless interface unit, the processing unit, and the input/output unit. The power management unit and the processing unit operate to control the power consumption of the wireless interface unit and the processing unit by powering down the wireless interface device and controlling the power consumption of the processing unit. The input/output unit remains powered to detect user input. When user input is detected, the wireless interface unit and processing unit are fully powered.Type: ApplicationFiled: October 6, 2005Publication date: February 9, 2006Inventors: Kevin Cadieux, Robert Hulvey
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Patent number: 6985755Abstract: A wireless interface device services communications between a wirelessly enabled host and at least one user input device. The wireless interface device includes a wireless interface unit, a processing unit, an input/output unit, and a power management unit. The wireless interface unit wirelessly interfaces with the wirelessly enabled host using a communication interface protocol. The power management unit operably couples to the wireless interface unit, the processing unit, and the input/output unit. The power management unit and the processing unit operate to control the power consumption of the wireless interface unit and the processing unit by powering down the wireless interface device and controlling the power consumption of the processing unit. The input/output unit remains powered to detect user input. When user input is detected, the wireless interface unit and processing unit are fully powered.Type: GrantFiled: November 8, 2002Date of Patent: January 10, 2006Assignee: Broadcom CorporationInventors: Kevin Cadieux, Robert W. Hulvey
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Publication number: 20040230790Abstract: A host-side wireless interface services communications between a wireless user input device and a serviced host. The host-side wireless interface includes a wireless network interface, a host interface, and may include additional components. The wireless network interface wirelessly communicates with the wireless user input device. The host interface communicatively couples to the wireless interface and to the serviced host. When the serviced host initiates bootstrap operations via a Basic Input/Output System (BIOS), the host interface operates in a BIOS host interface mode to allow input from the wireless user input device to the BIOS during the bootstrap operations. Further, when the serviced host initiates Operating System (OS) operations, the host interface operates in an OS host interface mode, wherein the OS host interface mode differs from the BIOS host interface mode.Type: ApplicationFiled: September 30, 2003Publication date: November 18, 2004Inventors: Tong Zhang, Yuqian C. Wong, Robert W. Hulvey, Angel Polo, Kevin Cadieux
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Publication number: 20040097265Abstract: A wireless interface device services communications between a wirelessly enabled host and at least one user input device. The wireless interface device includes a wireless interface unit, a processing unit, an input/output unit, and a power management unit. The wireless interface unit wirelessly interfaces with the wirelessly enabled host using a communication interface protocol. The power management unit operably couples to the wireless interface unit, the processing unit, and the input/output unit. The power management unit and the processing unit operate to control the power consumption of the wireless interface unit and the processing unit by powering down the wireless interface device and controlling the power consumption of the processing unit. The input/output unit remains powered to detect user input. When user input is detected, the wireless interface unit and processing unit are fully powered.Type: ApplicationFiled: November 8, 2002Publication date: May 20, 2004Inventors: Kevin Cadieux, Robert W. Hulvey
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Patent number: 5956324Abstract: A DS3 level access, monitor and test system for a telephone network. The system provides selective, and hitless, bit overwrite in any of the embedded DS1, DS0 and subrate channels in a DS3 signal. Multiple DS0 and subrate channels can be tested via the asynchronous time slot interchange in conjunction with the recombiner of the present invention. The present invention further includes a lookahead reframer for framing to the DS3 signal. The present invention also includes a facilities data link (FDL) handler for capturing the FDL channel data in every DS1 channel in a DS3 signal. A high speed bit-for-bit compare is interfaced to a protect path to provide 1:1 fault protection in the system of the present invention. Full time performance monitoring on DS1 and DS3 signals is performed by a shared resource. The system of the present invention provides an integrated approach to synchronization measurement and relative synchronization.Type: GrantFiled: October 30, 1997Date of Patent: September 21, 1999Assignee: Applied Digital Access, Inc.Inventors: Thomas L. Engdahl, Paul R. Hartmann, Kevin Pope, Kevin Cadieux
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Patent number: 5875217Abstract: A DS3 level access, monitor and test system for a telephone network. The system provides selective, and hitless, bit overwrite in any of the embedded DS1, DS0 and subrate channels in a DS3 signal. Multiple DS0 and subrate channels can be tested via the asynchronous time slot interchange in conjunction with the recombiner of the present invention. The present invention further includes a lookahead reframer for framing to the DS3 signal. The present invention also includes a facilities data link (FDL) handler for capturing the FDL channel data in every DS1 channel in a DS3 signal. A high speed bit-for-bit compare is interfaced to a protect path to provide 1:1 fault protection in the system of the present invention. Full time performance monitoring on DS1 and DS3 signals is performed by a shared resource. The system of the present invention provides an integrated approach to synchronization measurement and relative synchronization.Type: GrantFiled: May 26, 1995Date of Patent: February 23, 1999Assignee: Applied Digital AccessInventors: Paul R. Hartmann, Kevin Pope, Kevin Cadieux
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Patent number: 5691976Abstract: A DS3 level access, monitor and test system for a telephone network. The system provides selective, and hitless, bit overwrite in any of the embedded DS1, DS0 and subrate channels in a DS3 signal. Multiple DS0 and subrate channels can be tested via the asynchronous time slot interchange in conjunction with the recombiner of the present invention. The present invention further includes a lookahead reframer for framing to the DS3 signal. The present invention also includes a facilities data link (FDL) handler for capturing the FDL channel data in every DS1 channel in a DS3 signal. A high speed bit-for-bit compare is interfaced to a protect path to provide 1:1 fault protection in the system of the present invention. Full time performance monitoring on DS1 and DS3 signals is performed by a shared resource. The system of the present invention provides an integrated approach to synchronization measurement and relative synchronization.Type: GrantFiled: September 7, 1993Date of Patent: November 25, 1997Assignee: Applied Digital AccessInventors: Thomas L. Engdahl, Paul R. Hartmann, Kevin Pope, Kevin Cadieux
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Patent number: 5623480Abstract: A DS3 level access, monitor and test system for a telephone network. The system provides selective, and hitless, bit overwrite in any of the embedded DS1, DS0 and substrate channels in a DS3 signal. Multiple DS0 and subrate channels can be tested via the asynchronous time slot interchange in conjunction with the recombiner of the present invention. The present invention further includes a lookahead reframer for framing to the DS3 signal. The present invention also includes a facilities data link (FDL) handler for capturing the FDL channel data in every DS1 channel in a DS3 signal. A high speed bit-for-bit compare is interfaced to a protect path to provide 1:1 fault protection in the system of the present invention. Full time performance monitoring on DS1 and DS3 signals is performed by a shared resource. The system of the present invention provides an integrated approach to synchronization measurement and relative synchronization.Type: GrantFiled: May 26, 1995Date of Patent: April 22, 1997Assignee: Applied Digital Access, Inc.Inventors: Paul R. Hartmann, Thomas L. Engdahl, Kevin Cadieux, Kevin Pope
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Patent number: 5602828Abstract: A DS3 level access, monitor and test system for a telephone network. The system provides selective, and hitless, bit overwrite in any of the embedded DS1, DS0 and subrate channels in a DS3 signal. Multiple DS0 and subrate channels can be tested via the asynchronous time slot interchange in conjunction with the recombiner of the present invention. The present invention further includes a lookahead reframer for framing to the DS3 signal. The present invention also includes a facilities data link (FDL) handler for capturing the FDL channel data in every DS1 channel in a DS3 signal. A high speed bit-for-bit compare is interfaced to a protect path to provide 1:1 fault protection in the system of the present invention. Full time performance monitoring on DS1 and DS3 signals is performed by a shared resource. The system of the present invention provides an integrated approach to synchronization measurement and relative synchronization.Type: GrantFiled: May 26, 1995Date of Patent: February 11, 1997Assignee: Applied Digital AccessInventors: Thomas L. Engdahl, Paul R. Hartmann, Kevin Pope, Kevin Cadieux
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Patent number: 5581228Abstract: A DS3 level access, monitor and test system including a digital comparator for a telephone network. A high speed bit-for-bit compare is interfaced to a protect path to provide 1:1 fault protection in the system of the present invention. Full time performance monitoring on DS1 and DS3 signals is performed by a shared resource. The system of the present invention provides an integrated approach to synchronization measurement and relative synchronization.Type: GrantFiled: May 26, 1995Date of Patent: December 3, 1996Assignee: Applied Digital Access, Inc.Inventors: Kevin Cadieux, Paul R. Hartmann, Kevin Pope
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Patent number: 5557616Abstract: A DS3 level access, monitor and test system for a telephone network. The system provides selective, and hitless, bit overwrite in any of the embedded DS1, DS0 and subrate channels in a DS3 signal. Multiple DS0 and subrate channels can be tested via the asynchronous time slot interchange in conjunction with the recombiner of the present invention. The present invention further includes a lookahead reframer for framing to the DS3 signal. The present invention also includes a facilities data link (FDL) handler for capturing the FDL channel data in every DS1 channel in a DS3 signal. A high speed bit-for-bit compare is interfaced to a protect path to provide 1:1 fault protection in the system of the present invention. Full time performance monitoring on DS1 and DS3 signals is performed by a shared resource. The system of the present invention provides an integrated approach to synchronization measurement and relative synchronization.Type: GrantFiled: May 26, 1995Date of Patent: September 17, 1996Assignee: Applied Digital Access, Inc.Inventors: Kevin Cadieux, Paul R. Hartmann