Patents by Inventor Kevin J. Haley
Kevin J. Haley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7132313Abstract: A semiconductor chip is shown containing an integral heat spreading layer that more effectively transmits heat from the die to ambient as a result of spreading the heat out on the die over a larger cross sectional area. Local hot spots are minimized which allows the semiconductor chip to operate at a higher frequency for a given upper threshold temperature. Also shown is a method of manufacturing such a semiconductor chip, and the associated method of cooling a semiconductor chip.Type: GrantFiled: November 25, 2003Date of Patent: November 7, 2006Assignee: Intel CorporationInventors: Michael O'Connor, Kevin J. Haley, Biswajit Sur
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Publication number: 20040104014Abstract: A semiconductor chip is shown containing an integral heat spreading layer that more effectively transmits heat from the die to ambient as a result of spreading the heat out on the die over a larger cross sectional area. Local hot spots are minimized which allows the semiconductor chip to operate at a higher frequency for a given upper threshold temperature. Also shown is a method of manufacturing such a semiconductor chip, and the associated method of cooling a semiconductor chip.Type: ApplicationFiled: November 25, 2003Publication date: June 3, 2004Applicant: Intel Corporation.Inventors: Michael O'Connor, Kevin J. Haley, Biswajit Sur
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Patent number: 6667548Abstract: A semiconductor chip is shown containing an integral heat spreading layer that more effectively transmits heat from the die to ambient as a result of spreading the heat out on the die over a larger cross sectional area. Local hot spots are minimized which allows the semiconductor chip to operate at a higher frequency for a given upper threshold temperature. Also shown is a method of manufacturing such a semiconductor chip, and the associated method of cooling a semiconductor chip.Type: GrantFiled: April 6, 2001Date of Patent: December 23, 2003Assignee: Intel CorporationInventors: Michael O'Connor, Kevin J. Haley, Biswajit Sur
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Publication number: 20020145194Abstract: A semiconductor chip is shown containing an integral heat spreading layer that more effectively transmits heat from the die to ambient as a result of spreading the heat out on the die over a larger cross sectional area. Local hot spots are minimized which allows the semiconductor chip to operate at a higher frequency for a given upper threshold temperature. Also shown is a method of manufacturing such a semiconductor chip, and the associated method of cooling a semiconductor chip.Type: ApplicationFiled: April 6, 2001Publication date: October 10, 2002Applicant: Intel CorporationInventors: Michael O'Connor, Kevin J. Haley, Biswajit Sur
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Patent number: 6404047Abstract: Socketable balls are mounted to a BGA package by first placing the balls into pockets or holes of a tray that are sized such that when the balls are inserted, an upper portion of the ball protrudes above a planar surface of the tray. A layer of a polymer material is then applied over the balls and a top area of each of the balls is exposed, and plated with solder. During the plating step the polymer provides a solder-tight seal against each of the balls such that, except for the top area, the rest of the surface area of the balls remains solder-free. The solder-plated top area of each of the balls is then bonded to the corresponding plurality of lands of the package by reflowing the solder to establish electrical contact therebetween.Type: GrantFiled: August 11, 2000Date of Patent: June 11, 2002Assignee: Intel CorporationInventors: Kevin J. Haley, Larry Moresco
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Publication number: 20010040788Abstract: A heat exchanger. A first heat transfer element has an end which forms an engaging surface. A second heat transfer element has a receptacle portion which is integrally formed and has an engaging surface that is urged against the engaging surface of the first heat transfer element when the first heat transfer element and the second heat transfer element are mated.Type: ApplicationFiled: September 30, 1998Publication date: November 15, 2001Inventors: MICHAEL O'CONNOR, KEVIN J. HALEY
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Patent number: 6313987Abstract: A heat exchanger adapated for heat dissipation. A first heat transfer element has an end which forms an engaging surface. A second heat transfer element has a receptacle portion which is integrally formed and has an engaging surface that is urged against the engaging surface of the first heat transfer element when the first heat transfer element and the second heat transfer element are mated.Type: GrantFiled: September 30, 1998Date of Patent: November 6, 2001Assignee: Intel CorporationInventors: Michael O'Connor, Kevin J. Haley
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Patent number: 6168976Abstract: Socketable balls are mounted to a BGA package by first placing the balls into pockets or holes of a tray that are sized such that when the balls are inserted, an upper portion of the ball protrudes above a planar surface of the tray. A layer of a polymer material is then applied over the balls and a top area of each of the balls is exposed, and plated with solder. During the plating step the polymer provides a solder-tight seal against each of the balls such that, except for the top area, the rest of the surface area of the balls remains solder-free. The solder-plated top area of each of the balls is then bonded to the corresponding plurality of lands of the package by reflowing the solder to establish electrical contact therebetween.Type: GrantFiled: January 6, 1999Date of Patent: January 2, 2001Assignee: Intel CorporationInventors: Kevin J. Haley, Larry Moresco
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Patent number: 6043560Abstract: A method and apparatus for controlling the thickness of a thermal interface between a processor die and a thermal plate in a microprocessor assembly are provided. The apparatus includes a generally rectangular shaped thermal top cover having a recessed portion of predetermined depth and aperture therein. The thermal top cover fits over the processor die. A thermal interface layer fills the recessed portion of the thermal top cover covering the processor die. The depth of the recessed portion is greater than the thickness of the processor die so that the thickness of the thermal interface layer is controlled. A thermal plate is placed over the thermal top cover in contact with the thermal grease so as to form a thermal path from the processor die to the thermal plate.Type: GrantFiled: December 3, 1997Date of Patent: March 28, 2000Assignee: Intel CorporationInventors: Kevin J. Haley, Niel C. Delaplane, Ravindranath V. Mahajan, Robert Starkston, Charles A. Gealer, Joseph C. Krauskopf
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Patent number: 5359768Abstract: A very small integrated circuit package. The package of the present invention includes a substrate or die coupled to a heatsink. The substrate or die has solder bumps for being directly mounted to a circuit board. The heatsink is coupled to the die before the die is mounted to the circuit board. The heatsink is mounted using adhesive. By mounting the heatsink before the die is mounted, the heatsink may be used to handle of the substrate or die during the manufacturing and testing process, thereby increasing the reliability of the die by increased protection.Type: GrantFiled: July 16, 1993Date of Patent: November 1, 1994Assignee: Intel CorporationInventor: Kevin J. Haley
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Patent number: 5359225Abstract: A high leadcount surface mount IC package. The IC package of the present invention includes a plastic molded compound which is localized over the surface of the die, such that it covers the interconnections of the die. The package includes a leadframe having many leads. The leads are supported using a ring support structure.Type: GrantFiled: November 6, 1992Date of Patent: October 25, 1994Assignee: Intel CorporationInventor: Kevin J. Haley
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Patent number: 5290735Abstract: A high leadcount surface mount IC package. The IC package of the present invention includes a plastic molded compound which is localized over the surface of the die, such that it covers the interconnections of the die. The package includes a leadframe having many leads. The leads are supported using a ring support structure.Type: GrantFiled: February 1, 1993Date of Patent: March 1, 1994Assignee: Intel CorporationInventor: Kevin J. Haley