Abstract: A machine learning module receives inputs comprising attributes of a storage controller, wherein the attributes affect allocation of a plurality of resources to a plurality of interfaces. In response to a predetermined number of I/O operations occurring in the storage controller, a generation is made via forward propagation through a plurality of layers of the machine learning module, of an output value corresponding to a number of resources to allocate to an interface. A margin of error is calculated based on comparing the generated output value to an expected output value that is generated from an indication of a predetermined function based at least on a number of I/O operations that are waiting for a resource and a number of available resources. An adjustment is made of weights of links that interconnect nodes of the plurality of layers via back propagation, to reduce the margin of error.

Abstract: A plurality of interfaces that share a plurality of resources in a storage controller are maintained. In response to an occurrence of a predetermined number of operations associated with an interface of the plurality of interfaces, an input is provided on a plurality of attributes of the storage controller to a machine learning module. In response to receiving the input, the machine learning module generates an output value corresponding to a number of resources of the plurality of resources to allocate to the interface in the storage controller.

Abstract: A machine learning module receives inputs comprising attributes of a storage controller, wherein the attributes affect allocation of a plurality of resources to a plurality of interfaces. In response to a predetermined number of I/O operations occurring in the storage controller, a generation is made via forward propagation through a plurality of layers of the machine learning module, of an output value corresponding to a number of resources to allocate to an interface. A margin of error is calculated based on comparing the generated output value to an expected output value that is generated from an indication of a predetermined function based at least on a number of I/O operations that are waiting for a resource and a number of available resources. An adjustment is made of weights of links that interconnect nodes of the plurality of layers via back propagation, to reduce the margin of error.

Abstract: A plurality of interfaces that share a plurality of resources in a storage controller are maintained. In response to an occurrence of a predetermined number of operations associated with an interface of the plurality of interfaces, an input is provided on a plurality of attributes of the storage controller to a machine learning module. In response to receiving the input, the machine learning module generates an output value corresponding to a number of resources of the plurality of resources to allocate to the interface in the storage controller.

Abstract: A computer-implemented method according to one embodiment includes, for each portion of data in a write cache: determining whether a given portion of data was added to the write cache prior to completion of a most recent flash copy operation. In response to determining that the given portion of data was not added to the write cache prior to completion of a most recent flash copy operation, a determination is made of whether the given portion of data has a clock bit value corresponding thereto. In response to determining that the given portion of data does not have a clock bit value corresponding thereto, a clock bit value calculated for the given portion of data based on a current amount of unused storage capacity in the write cache. Moreover, in response to determining that the given portion of data has a clock bit value corresponding thereto, it is decremented.

Abstract: Data operations, requiring a lock, are batched into a set of operations to be performed on a per-core basis. A global lock for the set of operations is periodically acquired, the set of operations is performed, and the global lock is freed so as to avoid excessive duty cycling of lock and unlock operations in the computing storage environment.

Abstract: A processor, operable in a computing storage environment, for each rank in a storage management device in the computing storage environment, allocates a lower maximum count defined by a predetermined lower maximum count of Task Control Blocks (TCBs) of a rank for performing destage operations, and a higher maximum count of TCBs to be implemented for performing a storage operation, and performs the storage operation using up to the lower maximum count of TCBs, yet only allows those TCBs above the lower maximum count to be allocated for performing the storage operation satisfying at least one criterion.

Abstract: A processor, operable in a computing storage environment, for each rank in a storage management device in the computing storage environment, allocates a lower maximum count defined by a predetermined lower maximum count of Task Control Blocks (TCBs) of a rank for performing destage operations, and a higher maximum count of TCBs to be implemented for performing a storage operation, and performs the storage operation using up to the lower maximum count of TCBs, yet only allows those TCBs above the lower maximum count to be allocated for performing the storage operation satisfying at least one criterion.

Abstract: For cache/data management in a computing storage environment, incoming data segments into a Non Volatile Storage (NVS) device of the computing storage environment are validated against a bitmap to determine if the incoming data segments are currently in use. Those of the incoming data segments determined to be currently in use are designated to the computing storage environment to protect data integrity.

Abstract: A processor, operable in a computing storage environment, for each rank in a storage management device in the computing storage environment, allocates a lower maximum count, and a higher maximum count, of Task Control Blocks (TCBs) to be implemented for performing a storage operation, and performs the storage operation using up to the lower maximum count of TCBs, yet only allows those TCBs above the lower maximum count to be allocated for performing the storage operation satisfying at least one criterion.

Abstract: A set of like tasks to be performed is organized into a first group. Upon a determined imbalance between dispatch queue depths greater than a predetermined threshold, the set of like tasks is reassigned to an additional group.

Abstract: An apparatus, system, and method are disclosed for relocating storage pool hot spots. An identification module identifies a hot spot on a first storage pool if accesses to the first storage pool exceed an access threshold. The first storage pool is part of a plurality of storage pools. Each storage pool comprises a plurality of logical segments from a plurality of storage devices. Each storage device is of a specified class. A migration module dynamically migrates data of a first logical segment to a second storage pool. The migration is transparent to a host and the data of the first logical segment is continuously available to the host.

Abstract: A processor, operable in a computing storage environment, allocates portions of a Scatter Index Table (SIT) disproportionately between a larger portion dedicated for meta data tracks, and a smaller portion dedicated for user data tracks, and processes a storage operation through the disproportionately allocated portions of the SIT using an allocated number of Task Control Blocks (TCB).

Abstract: For a plurality of input/output (I/O) operations waiting to assemble complete data tracks from data segments, a process, separate from a process responsible for the data assembly into the complete data tracks, is initiated for waking a predetermined number of the waiting I/O operations. A total number of I/O operations to be awoken at each of an iterated instance of the waking is limited.

Abstract: For a plurality of input/output (I/O) operations waiting to assemble complete data tracks from data segments, a process, separate from a process responsible for the data assembly into the complete data tracks, is initiated for waking a predetermined number of the waiting I/O operations. A total number of I/O operations to be awoken at each of an iterated instance of the waking is limited.

Abstract: For cache/data management in a computing storage environment, incoming data segments into a Non Volatile Storage (NVS) device of the computing storage environment are validated against a bitmap to determine if the incoming data segments are currently in use. Those of the incoming data segments determined to be currently in use are designated to the computing storage environment to protect data integrity.

Abstract: A set of like tasks to be performed is organized into a first group. Upon a determined imbalance between dispatch queue depths greater than a predetermined threshold, the set of like tasks is reassigned to an additional group.

Abstract: Data operations, requiring a lock, are batched into a set of operations to be performed on a per-core basis. A global lock for the set of operations is periodically acquired, the set of operations is performed, and the global lock is freed so as to avoid excessive duty cycling of lock and unlock operations in the computing storage environment.

Abstract: A processor, operable in a computing storage environment, allocates portions of a Scatter Index Table (SIT) disproportionately between a larger portion dedicated for meta data tracks, and a smaller portion dedicated for user data tracks, and processes a storage operation through the disproportionately allocated portions of the SIT using an allocated number of Task Control Blocks (TCB).

Abstract: Method, system, and computer program product embodiments for facilitating data transfer from a write cache and NVS via a device adapter to a pool of storage devices by a processor or processors are provided. The processor(s) adaptively varies the destage rate based on the current occupancy of the NVS for a particular storage device and stage activity related to that storage device. The stage activity includes one or more of the storage device stage activity, device adapter stage activity, device adapter utilized bandwidth and the read/write speed of the storage device. These factors are generally associated with read response time in the event of a cache miss and not ordinarily associated with dynamic management of the destage rate. This combination maintains the desired overall occupancy of the NVS while improving response time performance.