Patents by Inventor Kevin John Patrick O'Brien

Kevin John Patrick O'Brien has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Processor Core, Processor and Method for Executing a Composite Scalar-Vector Very Lare Instruction Word (VLIW) Instruction
    Publication number: 20200142704
    Abstract: A processor core includes a storage device which stores a composite very large instruction word (VLIW) instruction, an instruction unit which obtains the composite VLIW instruction from the storage device and decodes the composite VLIW instruction to determine an operation to perform, and a composite VLIW instruction execution unit which executes the composite VLIW instruction to perform the operation.
    Type: Application
    Filed: December 31, 2019
    Publication date: May 7, 2020
    Inventors: Bruce M. Fleischer, Thomas Winters FOX, Arpith C. JACOB, Hans Mikael JACOBSON, Ravi NAIR, Kevin John Patrick O'BRIEN, Daniel Arthur PRENER
  • Executing a composite VLIW instruction having a scalar atom that indicates an iteration of execution
    Patent number: 10572263
    Abstract: A processor core includes a storage device which stores a composite very large instruction word (VLIW) instruction, an instruction unit which obtains the composite VLIW instruction from the storage device and decodes the composite VLIW instruction to determine an operation to perform, and a composite VLIW instruction execution unit which executes the decoded composite VLIW instruction to perform the operation.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: February 25, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Bruce M. Fleischer, Thomas Winters Fox, Arpith C. Jacob, Hans Mikael Jacobson, Ravi Nair, Kevin John Patrick O'Brien, Daniel Arthur Prener
  • Processor Core, Processor And Method For Executing A Composite Scalar-Vector Very Lare Instruction Word (VLIW) Instruction
    Publication number: 20170286108
    Abstract: A processor core includes a storage device which stores a composite very large instruction word (VLIW) instruction, an instruction unit which obtains the composite VLIW instruction from the storage device and decodes the composite VLIW instruction to determine an operation to perform, and a composite VLIW instruction execution unit which executes the decoded composite VLIW instruction to perform the operation.
    Type: Application
    Filed: March 31, 2016
    Publication date: October 5, 2017
    Inventors: Bruce M. Fleischer, Thomas Winters FOX, Arpith C. JACOB, Hans Mikael Jacobson, Ravi Nair, Kevin John Patrick O'Brien, Daniel Arthur Prener