Abstract: Received data messages are delayed for further processing based on a bypass condition. Data messages that conform to the bypass condition are not delayed. Data messages that do not conform to the bypass condition are delayed by a delay. Data messages can be representative of orders in an electronic marketplace or trading system. The bypass condition can include indication of a post-only order. The bypass condition can further include indication of a volume that meets or exceeds a minimum volume. The delay can be calculated from a base delay and a variance that modifies the base delay. The variance can be randomly or pseudo-randomly selected and can conform to a maximum variance.

Abstract: Received data messages are delayed for further processing based on a bypass condition. Data messages that conform to the bypass condition are not delayed. Data messages that do not conform to the bypass condition are delayed by a delay. Data messages can be representative of orders in an electronic marketplace or trading system. The bypass condition can include indication of a post-only order. The bypass condition can further include indication of a volume that meets or exceeds a minimum volume. The delay can be calculated from a base delay and a variance that modifies the base delay. The variance can be randomly or pseudo-randomly selected and can conform to a maximum variance.

Abstract: Received data messages are delayed for further processing based on a bypass condition. Data messages that conform to the bypass condition are not delayed. Data messages that do not conform to the bypass condition are delayed by a delay. Data messages can be representative of orders in an electronic marketplace or trading system. The bypass condition can include indication of a post-only order. The bypass condition can further include indication of a volume that meets or exceeds a minimum volume. The delay can be calculated from a base delay and a variance that modifies the base delay. The variance can be randomly or pseudo-randomly selected and can conform to a maximum variance.

Abstract: Received data messages are delayed for further processing based on a bypass condition. Data messages that conform to the bypass condition are not delayed. Data messages that do not conform to the bypass condition are delayed by a delay. Data messages can be representative of orders in an electronic marketplace or trading system. The bypass condition can include indication of a post-only order. The bypass condition can further include indication of a volume that meets or exceeds a minimum volume. The delay can be calculated from a base delay and a variance that modifies the base delay. The variance can be randomly or pseudo-randomly selected and can conform to a maximum variance.

Abstract: New data messages for updating a database can indicate a latency tolerance. The latency tolerance can constrain new data records based on such new data messages to also indicate the latency tolerance. Latency-tolerant data records can be constrained to remain in the working database for a minimum duration. Data records present in the working database can be prioritized according to prioritization criteria that increases priority of data records indicating latency tolerance. Matching incoming data messages with the data records present in the working database can be based on such prioritization. A matched data record can be updated or deleted upon successful match with an incoming data message. The latency tolerance can be applied to trading systems for financial instruments or interests as a long-life order that rests in an order book without being able to be cancelled or updated for the minimum duration in exchange for priority during order matching.

Abstract: Elongated fins of a first semiconductor material are insulated from and formed over an underlying substrate layer. Elongated gates of a second semiconductor material are then formed to cross over the elongated fins at channel regions, and the gate side walls are covered by sidewall spacers. A protective material is provided to cover the underlying substrate layer and define sidewall spacers on side walls of the elongated fins between the elongated gates. The first semiconductor material and insulating material of the elongated fins located between the protective material sidewall spacers (but not under the elongated gates) is removed to form trenches aligned with the channel regions. Additional semiconductor material is then epitaxially grown inside each trench between the elongated gates to form source-drain regions adjacent the channel regions formed by the elongated fins of the first semiconductor material located under the elongated gates.

Abstract: Received data messages are delayed for further processing based on a bypass condition. Data messages that conform to the bypass condition are not delayed. Data messages that do not conform to the bypass condition are delayed by a delay. Data messages can be representative of orders in an electronic marketplace or trading system. The bypass condition can include indication of a post-only order. The bypass condition can further include indication of a volume that meets or exceeds a minimum volume. The delay can be calculated from a base delay and a variance that modifies the base delay. The variance can be randomly or pseudo-randomly selected and can conform to a maximum variance.

Abstract: New data messages for updating a database can indicate a latency tolerance. The latency tolerance can constrain new data records based on such new data messages to also indicate the latency tolerance. Latency-tolerant data records can be constrained to remain in the working database for a minimum duration. Data records present in the working database can be prioritized according to prioritization criteria that increases priority of data records indicating latency tolerance. Matching incoming data messages with the data records present in the working database can be based on such prioritization. A matched data record can be updated or deleted upon successful match with an incoming data message. The latency tolerance can be applied to trading systems for financial instruments or interests as a long-life order that rests in an order book without being able to be cancelled or updated for the minimum duration in exchange for priority during order matching.

Abstract: Passive or rested orders can be priority ranked in an order book database based on price and further based on fee indications for the rested orders. Fee indications may include rebate give-ups that are given to the entities making active orders. Newly incoming or active orders are matched to rested orders according to the ranking. Entities trading passively may thus be able to prioritize rested orders by way of selectable rebate give-up, and further may peg rebate give-up at or above the market. Entities trading actively may specify a minimum rebate give-up required from the book to effect a trade.

Abstract: Pulmonary arterial hypertension (PAH) is a devastatig disease with high mortality. Familial cases of PAH are usually characterized by autosomal dominant transmission with reduced penetrance, and mutations in Bone Morphogenetic Protein receptor type 2 (BMPR2), account for approximately 70% of familial cases, but some familial cases are of unknown genetic etiology. A novel heterozygous missense variant c.608 G>A, G203D in the KCNK3 (potassium channel subfamily K, member 3) gene was identified as a disease causing candidate gene in the family. Five additional heterozygous missense variants were independently identified in 92 unrelated familial PAH and 230 idiopathic PAH patients, genetically independently confirming the results in the first family. All six novel variants were located in highly conserved domains and were predicted to be damaging.

Abstract: A semiconductor material is patterned to define elongated fins insulated from an underlying substrate. A polysilicon semiconductor material is deposited over and in between the elongated fins, and is patterned to define elongated gates extending to perpendicularly cross over the elongated fins at a transistor channel. Sidewall spacers are formed on side walls of the elongated gates. Portions of the elongated fins located between the elongated gates are removed, along with the underlying insulation, to expose the underlying substrate. One or more semiconductor material layers are then epitaxially grown from the underlying substrate at locations between the elongated gates. The one or more semiconductor material layers may include an undoped epi-layer and an overlying doped epi-layer. The epitaxial material defines a source or drain of the transistor.

Abstract: Elongated fins of a first semiconductor material are insulated from and formed over an underlying substrate layer (of either SOI or bulk type). Elongated gates of a second semiconductor material are then formed to cross over the elongated fins at channel regions, and the gate side walls are covered by sidewall spacers. A protective material is provided to cover the underlying substrate layer and define sidewall spacers on side walls of the elongated fins between the elongated gates. The first semiconductor material and insulating material of the elongated fins located between the protective material sidewall spacers (but not under the elongated gates) is removed to form trenches aligned with the channel regions. Additional semiconductor material is then epitaxially grown inside each trench between the elongated gates to form source-drain regions adjacent the channel regions formed by the elongated fins of the first semiconductor material located under the elongated gates.

Abstract: A semiconductor material is patterned to define elongated fins insulated from an underlying substrate. A polysilicon semiconductor material is deposited over and in between the elongated fins, and is patterned to define elongated gates extending to perpendicularly cross over the elongated fins at a transistor channel. Sidewall spacers are formed on side walls of the elongated gates. Portions of the elongated fins located between the elongated gates are removed, along with the underlying insulation, to expose the underlying substrate. One or more semiconductor material layers are then epitaxially grown from the underlying substrate at locations between the elongated gates. The one or more semiconductor material layers may include an undoped epi-layer and an overlying doped epi-layer. The epitaxial material defines a source or drain of the transistor.

Abstract: A method for providing calibration and synchronization pulses in a pulse width modulation (PWM) signal including cell voltage measurement pulses, where the calibration pulses are four calibration pulses having a pattern of a narrow width high voltage pulse followed by a wide width low voltage pulse followed by a narrow width high voltage pulse followed by a wide width low voltage pulse that has a very low probability of occurring in a practical fuel cell system. The method modulates a combined sequence of the voltage measurement signals and the calibration pulses using an inverted saw tooth wave to provide the PWM signal, where a width of the pulses representing the voltage signals are proportional to a width of the pulses representing the calibration pulses.

Abstract: A copper interconnect structure has an intrinsic graphene cap for improving back end of line (BEOL) reliability of the interconnect by reducing time-dependent dielectric breakdown (TDDB) failure and providing resistance to electromigration. Carbon atoms are selectively deposited onto a copper layer of the interconnect structure by a deposition process to form a graphene cap. The graphene cap increases the activation energy of the copper, thus allowing for higher current density and improved resistance to electromigration of the copper. By depositing the graphene cap on the copper, the dielectric regions remain free of conductors and, thus, current leakage within the interlayer dielectric regions is reduced, thereby reducing TDDB failure and increasing the lifespan of the interconnect structure. The reduction of TDDB failure and improved resistance to electromigration improves BEOL reliability of the copper interconnect structure.

Abstract: A method for providing calibration and synchronization pulses in a pulse width modulation (PWM) signal including cell voltage measurement pulses, where the calibration pulses are four calibration pulses having a pattern of a narrow width high voltage pulse followed by a wide width low voltage pulse followed by a narrow width high voltage pulse followed by a wide width low voltage pulse that has a very low probability of occurring in a practical fuel cell system. The method modulates a combined sequence of the voltage measurement signals and the calibration pulses using an inverted saw tooth wave to provide the PWM signal, where a width of the pulses representing the voltage signals are proportional to a width of the pulses representing the calibration pulses.

Abstract: A copper interconnect structure has an intrinsic graphene cap for improving back end of line (BEOL) reliability of the interconnect by reducing time-dependent dielectric breakdown (TDDB) failure and providing resistance to electromigration. Carbon atoms are selectively deposited onto a copper layer of the interconnect structure by a deposition process to form a graphene cap. The graphene cap increases the activation energy of the copper, thus allowing for higher current density and improved resistance to electromigration of the copper. By depositing the graphene cap on the copper, the dielectric regions remain free of conductors and, thus, current leakage within the interlayer dielectric regions is reduced, thereby reducing TDDB failure and increasing the lifespan of the interconnect structure. The reduction of TDDB failure and improved resistance to electromigration improves BEOL reliability of the copper interconnect structure.

Abstract: A method of masking a surface of a gas turbine engine component wherein the ability of a masking member to retain the shape of the surface to which it is applied is used as a primary fixing strategy to releasably hold the masking member in position over the surface of the gas turbine engine component.

Abstract: A method of masking a surface of a gas turbine engine component wherein the ability of a masking member to retain the shape of the surface to which it is applied is used as a primary fixing strategy to releasably hold the masking member in position over the surface of the gas turbine engine component.

Abstract: Acoustic emission samples for a chemical mechanical polishing process are acquired and analyzed using a Fourier transform to detect wafer vibrations characteristic of scratching. When excess noise levels are detected at frequencies or within frequency bands being monitored, the polishing process is halted and an alarm is generated for the operator. Such in-situ detection minimizes damage to the wafer being polished and limits the damage to a single wafer rather than a run of wafers. Polish endpoint detection may be integrated within the scratch detection mechanism.