Patents by Inventor Kevin Schofield
Kevin Schofield has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20120254181Abstract: A method is disclosed, for recognizing whether some electronic data is the digital representation of a piece of text and, if so, in which character encoding it has been encoded. A fingerprint is constructed from the data, wherein the fingerprint comprises, for each of a plurality of predetermined character encoding schemes, at least one confidence value, representing a confidence that the data was encoded using said character encoding scheme. The fingerprint also comprises a frequency value for each of a subset of byte values, each frequency value representing the frequency of occurrence of a respective byte value in the data. A statistical classification of the data is then performed based on the fingerprint.Type: ApplicationFiled: March 30, 2012Publication date: October 4, 2012Applicant: CLEARSWIFT LIMITEDInventors: Kevin Schofield, Istvan Biro
-
Publication number: 20050254662Abstract: The present invention is directed to a method and system for automatic calibration of an acoustic system. The acoustic system may include a source A/V device, calibration computing device, and multiple rendering devices. The calibration system may include a calibration component attached to each rendering device and a source calibration module. The calibration component on each rendering device includes a microphone. The source calibration module includes distance and optional angle calculation tools for automatically determining a distance between the rendering device and a specified reference point upon return of the test signal from the calibration component.Type: ApplicationFiled: May 14, 2004Publication date: November 17, 2005Applicant: Microsoft CorporationInventors: William Blank, Kevin Schofield, Kirk Olynyk, Robert Atkinson, James Johnston, Michael Van Flandern
-
Publication number: 20050203430Abstract: A small wearable recall device is provided to capture images triggered by a combination of a detection of a capture condition (e.g., changes in motion, temperature or light level) followed by a relatively stable period, as detected by an accelerometer. By triggering on the combination of a detected capture condition followed by a detected stability condition, a clearer image of the environment of an interesting event is expected to be captured. The small size of the recall device makes it possible to integrate it into common portable consumer products, such as MP3 players, purses, clothing, hats, backpacks, necklaces, collars, and other human-wearable products.Type: ApplicationFiled: March 1, 2004Publication date: September 15, 2005Inventors: Lyndsay Williams, Kenneth Wood, Kevin Schofield
-
Patent number: 6924336Abstract: A polymer dispersion comprising an aqueous, continuous phase and dispersed particles of polyurethane, which is based on organic, non-aromatic isocyanates with a functionality of at least 2, said polyurethane having a high degree of crystallinity and whose crystalline phase has a melting point between 25 and 70° C., and a copolymer and/or terpolymer having a Tg (glass transition temperature) between ?20 and +50° C. obtainable by emulsion polymerization of ethylenically unsaturated monomeric materials containing only C, H, O and/or N atoms, which monomeric materials comprise from 0.Type: GrantFiled: May 31, 2001Date of Patent: August 2, 2005Assignee: Celanese International CorporationInventors: Hans Uwe Faust, Alistair John McLennan, Kevin Schofield
-
Patent number: 6664979Abstract: A computer system having a video display runs an operating system that provides a desktop environment to a user and a file system. The desktop environment has associated systems settings that affect the desktop environment. In this method, a first set of values for at least a portion of the system settings are stored in a storage device in a computer network so that the first set of values is visible in the file system. A second set of values, for the same portion of the system settings for which values are stored in the first set of values, is also stored in the storage device such that the second set of values is visible in the file system. In response to a choice by the user between the first set of values and the second set of values, the system settings are updated to have the values specified by the chosen set of values.Type: GrantFiled: September 5, 2000Date of Patent: December 16, 2003Assignee: Microsoft CorporationInventors: Kevin Schofield, Daniel Plastina, Joyce Alison Grauman, Mark A. Malamud, David A. Barnes, Chris E. Tobey, Roxanne M. Lehmann, Renee Marceau, William T. Flora, Eric L. Van Doren, Virginia E. Howlett, Isaac J. Heizer, David A. Bolnick
-
Patent number: 6559519Abstract: An integrated circuit including a fabricated die having a cyanate ester buffer coating material thereon. The cyanate ester buffer coating material includes one or more openings for access to the die. A package device may be connected to the die bond pads through such openings. Further, an integrated circuit device is provided that includes a fabricated wafer including a plurality of integrated circuits fabricated thereon. The fabricated wafer has an upper surface with a cyanate ester buffer coating material cured on the upper surface of the fabricated integrated circuit device. Further, a method of producing an integrated circuit device includes providing a fabricated wafer including a plurality of integrated circuits and applying a cyanate ester coating material on a surface of the fabricated wafer. The application of cyanate ester coating material may include spinning the cyanate ester coating material on the surface of the fabricated wafer to form a buffer coat.Type: GrantFiled: July 16, 2002Date of Patent: May 6, 2003Assignee: Micron Technology, Inc.Inventors: J. Mike Brooks, Jerrold L. King, Kevin Schofield
-
Publication number: 20030050347Abstract: A polymer dispersion comprising an aqueous, continuous phase and dispersed particles of polyurethane, which is based on organic, non-aromatic isocyanates with a functionality of at least 2, said polyurethane having a high degree of crystallinity and whose crystalline phase has a melting point between 25 and 70° C., and a copolymer and/or terpolymer having a Tg (glass transition temperature) between −20 and +50° C. obtainable by emulsion polymerization of ethylenically unsaturated monomeric materials containing only C, H, O and/or N atoms, which monomeric materials comprise from 0.Type: ApplicationFiled: August 12, 2002Publication date: March 13, 2003Inventors: Hans Uwe Faust, Alistair John McLennan, Kevin Schofield
-
Publication number: 20020195687Abstract: An integrated circuit including a fabricated die having a cyanate ester buffer coating material thereon. The cyanate ester buffer coating material includes one or more openings for access to the die. A package device may be connected to the die bond pads through such openings. Further, an integrated circuit device is provided that includes a fabricated wafer including a plurality of integrated circuits fabricated thereon. The fabricated wafer has an upper surface with a cyanate ester buffer coating material cured on the upper surface of the fabricated integrated circuit device. Further, a method of producing an integrated circuit device includes providing a fabricated wafer including a plurality of integrated circuits and applying a cyanate ester coating material on a surface of the fabricated wafer. The application of cyanate ester coating material may include spinning the cyanate ester coating material on the surface of the fabricated wafer to form a buffer coat.Type: ApplicationFiled: July 16, 2002Publication date: December 26, 2002Applicant: MICRON TECHNOLOGY, INC.Inventors: J. Mike Brooks, Jerrold L. King, Kevin Schofield
-
Patent number: 6420214Abstract: An integrated circuit including a fabricated die having a cyanate ester buffer coating material thereon. The cyanate ester buffer coating material includes one or more openings for access to the die. A package device may be connected to the die bond pads through such openings. Further, an integrated circuit device is provided that includes a fabricated wafer including a plurality of integrated circuits fabricated thereon. The fabricated wafer has an upper surface with a cyanate ester buffer coating material cured on the upper surface of the fabricated integrated circuit device. Further, a method of producing an integrated circuit device includes providing a fabricated wafer including a plurality of integrated circuits and applying a cyanate ester coating material on a surface of the fabricated wafer. The application of cyanate ester coating material may include spinning the cyanate ester coating material on the surface of the fabricated wafer to form a buffer coat.Type: GrantFiled: April 19, 2000Date of Patent: July 16, 2002Assignee: Micron Technology, Inc.Inventors: J. Mike Brooks, Jerrold L. King, Kevin Schofield
-
Patent number: 6122558Abstract: A control panel provides controllers for setting the values of system settings. Each controller controls a subset of related system settings. Scheme objects are provided for encapsulating values of system settings for a controller. The current values of system settings controlled by a controller may be updated by applying the values held within a scheme. Grand schemes are provided for aggregating the system settings for multiple controllers. Thus, the system settings controlled by multiple controllers may be updated in a single transaction by applying a grand scheme to the control panel. Easily practiced approaches to applying schemes and grand schemes to the control panel are provided. Moreover, methods for easily creating and editing the contents of schemes and grand schemes are provided.Type: GrantFiled: September 22, 1997Date of Patent: September 19, 2000Assignee: Microsoft CorporationInventors: David A. Barnes, Joyce A. Grauman, Renee Marceau, Virginia E. S. Howlett, Kevin Schofield, Mark A. Malamud, Issac J. Heizer, Daniel F. E. Plastina, Chris E. Tobey, Rosanne M. Lehmann, William T. Flora, Eric L. Van Doren
-
Patent number: 6060343Abstract: An integrated circuit including a fabricated die having a cyanate ester buffer coating material thereon. The cyanate ester buffer coating material includes one or more openings for access to the die. A package device may be connected to the die bond pads through such openings. Further, an integrated circuit device is provided that includes a fabricated wafer including a plurality of integrated circuits fabricated thereon. The fabricated wafer has an upper surface with a cyanate ester buffer coating material cured on the upper surface of the fabricated integrated circuit device. Further, a method of producing an integrated circuit device includes providing a fabricated wafer including a plurality of integrated circuits and applying a cyanate ester coating material on a surface of the fabricated wafer. The application of cyanate ester coating material may include spinning the cyanate ester coating material on the surface of the fabricated wafer to form a buffer coat.Type: GrantFiled: February 25, 1999Date of Patent: May 9, 2000Assignee: Micron Technology, Inc.Inventors: J. Mike Brooks, Jerrold L. King, Kevin Schofield
-
Patent number: 5903046Abstract: An integrated circuit including a fabricated die having a cyanate ester buffer coating material thereon. The cyanate ester buffer coating material includes one or more openings for access to the die. A package device may be connected to the die bond pads through such openings. Further, an integrated circuit device is provided that includes a fabricated wafer including a plurality of integrated circuits fabricated thereon. The fabricated wafer has an upper surface with a cyanate ester buffer coating material cured on the upper surface of the fabricated integrated circuit device. Further, a method of producing an integrated circuit device includes providing a fabricated wafer including a plurality of integrated circuits and applying a cyanate ester coating material on a surface of the fabricated wafer. The application of cyanate ester coating material may include spinning the cyanate ester coating material on the surface of the fabricated wafer to form a buffer coat.Type: GrantFiled: February 20, 1996Date of Patent: May 11, 1999Assignee: Micron Technology, Inc.Inventors: J. Mike Brooks, Jerrold L. King, Kevin Schofield