Abstract: The invention relates to bandgap reference voltage generator circuit including a first bipolar transistor and a second bipolar transistor, a first resistor connected so that the voltage drop across it corresponds to the difference between the base/emitter voltages of the two bipolar transistors, and which is located in the collector current path of the second transistor, and a second resistor located in the collector current path of both transistors.

Abstract: A step-up DC voltage converters circuit and method of operation which overcomes the problems associated with the prior art skip mode converters by reversing the flow of energy in the step-up DC voltage converter at the end of each switching cycle for a short constant time duration, thus making it possible to operate the step-up DC voltage converter over the full load current range at a fixed frequency which substantially facilitates filtering the output voltage. In addition to this the peak-to-peak output voltage ripple is less as compared to that of skip mode converters.

Abstract: The invention relates to switching regulators with at least one inductance and four controllable switches which can be controlled by a control circuit in such a way that the switching regulators may be operated separately in a step-up mode as well as in a step-down mode, whereby in each clock cycle of either of the modes only two switches each are actuated, which in comparison with previous similar switching regulators, where in each clock cycle four switching operations take place, results in current saving effects because of reduced switching losses and lower currents. These are achieved by an element which constantly monitors the duty cycle of one of the switches and, when in the step-down mode the duty cycle approaches 100%, causes a switch-over into the step-up mode, and when in the step-up mode the duty cycle of 0% is approached, causes the switch-over into the step-down mode. Furthermore, the invention relates to methods for operating switching regulators.

Abstract: A CMOS circuit (10), which is integrated in a semiconductor substrate, comprises a principal circuit part (12), which includes the major part of the circuit components in a well isolated from the substrate by a substrate diode. The CMOS circuit furthermore comprises a power output stage (16) driving an inductive load (26, 28). A sensor (18) is connected with one output (22, 24) of the power output stage (16) and on detection of a voltage biasing the substrate diode (30, 32) in the conducting direction produces a switching signal at the output. On occurrence of the switching signal produced by the sensor (18) a controllable switch (20) disconnects the supply voltage from the principal circuit part (12). In its own separate well (46) a status memory (14) is formed on the substrate adjacent to the principal circuit part (12), such status memory (14) comprising memory elements for storage of status data of the principal circuit part (12) on disconnection of the supply voltage.

Abstract: A high power MOS transistor consists of a large number of sub-transistors (T1 to T6) connected in parallel. The gate electrodes of the sub-transistors (T1 to T6) can be driven individually via controllable switching elements (SW1 to SW6; SQ1 to SQ5).

Abstract: The invention relates to a circuit arrangement for testing the operation of a current monitoring circuit for a power transistor. The power transistor consists of several single transistors of the same size connected in parallel, through which a fraction of the total current supplied to the power transistor flows. A monitoring signal proportional to the current flowing through one of the single transistors, is supplied to the current monitoring circuit, which generates an alarm signal when this monitoring signal exceeds a specified threshold value. The single transistors are divided into a group containing a small number of single transistors (T.sub.1.1 -T.sub.1.9) connected in parallel and a group with a larger number of single transistors (T.sub.2.1,1 -T.sub.2.2,9) connected in parallel, which can be driven independently of each other, where the single transistor (T.sub.S) supplying the monitoring signal belongs to the smaller group.

Abstract: A bus driver circuit having a driver input (16) for the reception of a data signal and a driver output (20) for the application of the output voltage of a voltage source (Vcc) to a bus core (10) in a manner dependent on the presence of a data signal at the driver input (16). It possesses a first controllable switch (A) placed between the voltage source (Vcc) and the driver output (20) and a control circuit loop (B), which on the application of the data signal to the driver input (16) is able to be placed in an active state by its producing a drive signal putting the controllable switch (A) in a conducting state. A second controllable switch (C) is between the control circuit loop (B) and the driver input (16). A comparator (D) compares the voltage at the driver output (20) with a reference voltage (V.sub.