Abstract: A semiconductor die includes a silicon carbide (SiC) substrate and a metal stack. The SiC substrate has a first surface including a semiconductor layer thereon and a second surface that is opposite the first surface. The metal stack has an upper surface that attaches to the second surface of the SiC substrate and a lower surface that is opposite the upper surface. The metal stack includes a eutectic solder layer and a noble metal layer on the eutectic solder layer. The noble metal layer comprises a final metal layer on the lower surface.

Abstract: A thermoelectric device with multiple headers and a method of manufacturing such a device are provided herein. In some embodiments, a thermoelectric device includes multiple thermoelectric legs, a cold header thermally attached to the thermoelectric legs, and a hot header thermally attached to the thermoelectric legs opposite the cold header. At least one of the cold header and the hot header includes at least one score line. According to some embodiments disclosed herein, this the thermal stress on the thermoelectric device can be greatly reduced or relieved by splitting the header into multiple pieces or by scoring the header by a depth X. This enables the use of larger thermoelectric devices and/or thermoelectric devices with an increased lifespan.

Abstract: A thermoelectric device with multiple headers and a method of manufacturing such a device are provided herein. In some embodiments, a thermoelectric device includes multiple thermoelectric legs, a cold header thermally attached to the thermoelectric legs, and a hot header thermally attached to the thermoelectric legs opposite the cold header. At least one of the cold header and the hot header includes at least one score line. According to some embodiments disclosed herein, this the thermal stress on the thermoelectric device can be greatly reduced or relieved by splitting the header into multiple pieces or by scoring the header by a depth X. This enables the use of larger thermoelectric devices and/or thermoelectric devices with an increased lifespan.

Abstract: A light emitting diode structure includes a diode region and a metal stack on the diode region. The metal stack includes a barrier layer on the diode region and a bonding layer on the barrier layer. The barrier layer is between the bonding layer and the diode region. The bonding layer includes gold, tin and nickel. A weight percentage of tin in the bonding layer is greater than 20 percent and a weight percentage of gold in the bonding layer is less than about 75 percent. A weight percentage of nickel in the bonding layer may be greater than 10 percent.

Abstract: A light emitting diode chip a support layer having a first face and a second face opposite the first face, a diode region on the first face of the support layer, and a bond pad on the second face of the support layer. The bond pad includes a gold-tin structure having a weight percentage of tin of 50% or more. The light emitting diode chip may include a plurality of active regions that are connected in electrical series on the light emitting diode chip.

Abstract: A light emitting diode chip a support layer having a first face and a second face opposite the first face, a diode region on the first face of the support layer, and a bond pad on the second face of the support layer. The bond pad includes a gold-tin structure having a weight percentage of tin of 50% or more. The light emitting diode chip may include a plurality of active regions that are connected in electrical series on the light emitting diode chip.

Abstract: A light emitting diode structure includes a diode region and a metal stack on the diode region. The metal stack includes a barrier layer on the diode region and a bonding layer on the barrier layer. The barrier layer is between the bonding layer and the diode region. The bonding layer includes gold, tin and nickel. A weight percentage of tin in the bonding layer is greater than 20 percent and a weight percentage of gold in the bonding layer is less than about 75 percent. A weight percentage of nickel in the bonding layer may be greater than 10 percent.

Abstract: A light emitting diode chip a support layer having a first face and a second face opposite the first face, a diode region on the first face of the support layer, and a bond pad on the second face of the support layer. The bond pad includes a gold-tin structure having a weight percentage of tin of 50% or more. The light emitting diode chip may include a plurality of active regions that are connected in electrical series on the light emitting diode chip.

Abstract: A wafer of light emitting diodes (LEDs) is laser scribed to produce a laser scribing cut. Then, the wafer is cleaned, for example by wet etching, to reduce scribe damage. Then, electrical contact layers for the LEDs are formed on the wafer that has been cleaned. Alternatively, the scribing cut may be produced by multiple etches before contact formation. Related LEDs are also described.

Abstract: A wafer of light emitting diodes (LEDs) is laser scribed to produce a laser scribing cut. Then, the wafer is cleaned, for example by wet etching, to reduce scribe damage. Then, electrical contact layers for the LEDs are formed on the wafer that has been cleaned. Alternatively, the scribing cut may be produced by multiple etches before contact formation. Related LEDs are also described.