Abstract: A field effect transistor (FET) transconductance device with varying gate lengths is disclosed. In one aspect, the varying effective gate lengths are used in a differential architecture to obtain linear even and odd order operation simultaneously. In a particular aspect, the effective gate lengths may be varied according to a differential Multi-Tanh-like architecture. This variation of effective gate lengths enables a compact implementation particularly as compared to varying gate width or emitter areas while also providing linear even and odd order operation simultaneously.

Abstract: A reinforcement learning receiver front-end (RL-RXFE) is disclosed having a low-noise amplifier (LNA) with adjustable supply voltage and adjustable bias voltages, a frequency selective limiter (FSL) coupled to the LNA and configured to attenuate undesired radio frequency (RF) bands and for sensing RF band power, and a combination of an analog-to-digital converter configured to convert an RF signal amplified by the LNA to a digital signal, a digital signal processor configured to generate spectrum information from the digital signal, and a baseband distortion by-product detector/sensor configured to generate distortion by-product information, and LNA dynamic information. A reinforcement learning processing circuitry receives and uses this information to perform reinforcement learning and to output control signals to the FSL and the LNA to maximize linearity and efficiency.

Abstract: The present disclosure pertains to a power amplifier system that promotes enhanced signal linearity and overall system efficiency. The system includes a power amplifier with an amplification path for a radio frequency (RF) signal, and detector circuitry operationally linked to sample locations along this path. The detector circuitry captures and transmits signal characteristics of the RF signal. A voltage standing wave ratio (VSWR) quadrant data generator in communication with the detector circuitry generates VSWR quadrant data based on the detected signal characteristics. The baseband circuitry, comprised of a memory unit preconfigured with digital pre-distortion (DPD) coefficients and a DPD processor, controls the shaping of pre-distortion applied to the RF signal based on the VSWR data, thereby enhancing signal linearity. The components of the system interconnect and collaboratively function to optimize the performance and efficiency of the power amplifier system.

Abstract: The present disclosure relates to an amplifier system having an output amplifier stage with a signal input and output, and a varactor with a capacitive output that is coupled to the signal input for adjusting input capacitance. The amplifier system also includes push varactor bias circuitry with a bias level output that is coupled to a tuning input, and a bias control input. The push varactor bias circuitry is configured to adjust bias voltage at the tuning input and thereby adjust the capacitance at the signal input by way of the varactor and reduce signal distortion at the signal output in response to a distortion compensation signal received at the bias control input.

Abstract: A load modulation amplifier is disclosed having a first power amplifier configured to amplify a first portion of a radio frequency signal below a threshold level. A second power amplifier has an N stack of transistor devices configured in a cascode configuration to amplify a second portion of the radio frequency signal that is above the threshold level, wherein N is a counting number that is greater than one.

Abstract: A load modulation amplifier is disclosed having a first amplifier and a second amplifier. An input quadrature coupler and an output quadrature coupler are coupled between the first amplifier and the second amplifier. A splitter has a first splitter output, a splitter input coupled to a signal input, and a second splitter output coupled to a second port of the input quadrature coupler, and a variable attenuator is coupled between the first splitter output and a first port of the input quadrature coupler. An attenuation controller has a controller output that is coupled to an attenuation control input of the variable attenuator, wherein the attenuation controller autonomously generates a control signal in response to a power sample signal in proportion to a radio frequency signal received at the radio frequency signal input.

Abstract: Disclosed is a tunable inductor device having a substrate, a planar spiral conductor having a plurality of spaced-apart turns disposed over the substrate, and a phase change switch (PCS) having a patch of a phase change material (PCM) disposed over the substrate between and in contact with a pair of adjacent segments of the plurality of spaced-apart turns, wherein the patch of the PCM is electrically insulating in an amorphous state and electrically conductive in a crystalline state. The PCS further includes a thermal element disposed adjacent to the patch of PCM, wherein the thermal element is configured to maintain the patch of the PCM to within a first temperature range until the patch of the PCM converts to the amorphous state and maintain the patch of the PCM within a second temperature range until the first patch of PCM converts to the crystalline state.

Abstract: Disclosed is a reconfigurable transistor device having a substrate, a plurality of first transistor fingers disposed in a first region over the substrate, and a phase change switch (PCS) having a patch of a phase change material (PCM) disposed over the substrate in a second region to selectively couple a first set of the plurality of first transistor fingers to a bus, wherein the patch of the PCM is electrically insulating in an amorphous state and electrically conductive in a crystalline state. The PCS further includes a thermal element disposed adjacent to the patch of PCM, wherein the first thermal element is configured to maintain the patch of the PCM to within a first temperature range until the patch of the PCM converts to the amorphous state and maintain the patch of the PCM within a second temperature range until the first patch of PCM converts to the crystalline state.

Abstract: A reconfigurable amplifier configured to decrease radio frequency (RF) signal distortion and increase dynamic range is disclosed. The reconfigurable amplifier includes an amplifier having an RF signal input, an RF signal output, and a bias signal input. A distortion detection network has a detector input coupled to the RF signal output and a detector output, wherein the distortion detector network is configured to generate a detection signal that is proportional to distortion at the RF signal output. A bias controller has a detection signal input coupled to the detector output and a bias output coupled to the bias signal input. The bias controller is configured to generate a bias signal that dynamically shifts level at the bias output to reduce the distortion at the RF signal output in response to the detection signal.

Abstract: Disclosed is an active photonic device having a Darlington configuration with a substrate and a collector layer that is over the substrate. The collector layer includes an inner collector region. An outer collector region substantially surrounds the inner collector region and is spaced apart from the inner collector region. A base layer is over the collector layer. A first outer base region and a second outer base region substantially surround the inner base region and are spaced apart from the inner base region and each other. An emitter layer is over the base layer. The emitter layer includes an inner emitter region that is ring-shaped and resides over and extends substantially around an outer periphery of the inner base region. A first outer emitter region and a second outer emitter region substantially surround the inner emitter region and are spaced apart from the inner emitter region and each other.

Abstract: A reconfigurable low-noise amplifier (LNA) is disclosed. The reconfigurable LNA includes amplifier circuitry having a gate terminal coupled to an input terminal, a source terminal coupled to a fixed voltage node, and a drain terminal coupled to an output terminal. The reconfigurable LNA further includes a gamma inverting network (GIN) coupled between the input terminal and the fixed voltage node, wherein the GIN has a first switch configured to disable the GIN during operation at first frequencies within a lower frequency band relative to a higher frequency band and to enable the GIN during operation at second frequencies within the higher frequency band.

Abstract: A transition frequency multiplier semiconductor device having a first source region, a second source region, and a common drain region is disclosed. A first channel region is located between the first source region and the common drain region, and a second channel region is located between the second source region and the common drain region. A first gate region is located within the first channel region to control current flow between the first source region and the common drain region, while a second gate region is located within the second channel region to control current flow between the second source region and the common drain region. An inactive channel region is located between the first channel region and the second channel region such that the first channel region is electrically isolated from the second channel region.

Abstract: A gallium nitride (GaN) power amplifier having a plurality of amplifier stages integrated into a monolithic integrated circuit is disclosed. The plurality of amplifier stages is coupled together between a radio frequency signal input and a radio frequency signal output, wherein at least one of the plurality of amplifier stages includes a first GaN transistor that is configured to have a first breakdown voltage that is no more than 75% of a second breakdown voltage of a second GaN transistor included in a different one of the plurality of amplifier stages.

Abstract: A reconfigurable low-noise amplifier (LNA) is disclosed. The reconfigurable LNA includes amplifier circuitry having a gate terminal coupled to an input terminal, a source terminal coupled to a fixed voltage node, and a drain terminal coupled to an output terminal. The reconfigurable LNA further includes a gamma inverting network (GIN) coupled between the input terminal and the fixed voltage node, wherein the GIN has a first switch configured to disable the GIN during operation at first frequencies within a lower frequency band relative to a higher frequency band and to enable the GIN during operation at second frequencies within the higher frequency band.

Abstract: An RF power amplifier includes a quadrature coupler, an in-phase amplifier, a quadrature amplifier, and a feed-forward signal path. The quadrature coupler includes an in-phase input node, a quadrature input node, an isolated node, and an RF signal output node. The in-phase amplifier includes an in-phase amplifier output node coupled to the in-phase input node. The quadrature amplifier includes a quadrature amplifier output node coupled to the quadrature input node. The feed-forward signal path is configured to couple and condition a signal from one of the in-phase amplifier and the quadrature amplifier in order to provide a feed-forward output signal that when provided at the feed-forward output node cancels one or more harmonic signals.

Abstract: A reconfigurable low-noise amplifier (LNA) is disclosed. The reconfigurable LNA includes amplifier circuitry having a gate terminal coupled to an input terminal, a source terminal coupled to a fixed voltage node, and a drain terminal coupled to an output terminal. The reconfigurable LNA further includes a gamma inverting network (GIN) coupled between the input terminal and the fixed voltage node, wherein the GIN has a first switch configured to disable the GIN during operation at first frequencies within a lower frequency band relative to a higher frequency band and to enable the GIN during operation at second frequencies within the higher frequency band.

Abstract: A load modulation amplifier is disclosed. The load modulation amplifier includes a carrier amplifier for amplifying a radio frequency signal when input power of the radio frequency signal is below a predetermined power threshold value and a peak amplifier coupled in parallel with the carrier amplifier for amplifying the radio frequency signal when input power of the radio signal is above the predetermined power threshold value. The load modulation amplifier further includes an output quadrature coupler configured to combine power from both the carrier amplifier and the peak amplifier for output through an output load terminal. Output impedance of the peak amplifier monotonically increases with increasing output power at the output load terminal.

Abstract: A load modulation amplifier is disclosed. The load modulation amplifier includes a carrier amplifier for amplifying a radio frequency signal when input power of the radio frequency signal is below a predetermined power threshold value and a peak amplifier coupled in parallel with the carrier amplifier for amplifying the radio frequency signal when input power of the radio signal is above the predetermined power threshold value. The load modulation amplifier further includes an output quadrature coupler configured to combine power from both the carrier amplifier and the peak amplifier for output through an output load terminal. Output impedance of the peak amplifier monotonically increases with increasing output power at the output load terminal.

Abstract: A distributed amplifier (DA) is disclosed. The DA includes a first plurality of inductive elements coupled in series forming a first plurality of connection nodes. The DA also includes a second plurality of inductive elements coupled in series forming a second plurality of connection nodes. The DA further includes a plurality of amplifier cells that each has a main transistor and a cascode transistor coupled into a cascode configuration. The cascode transistor has a current input coupled to a corresponding one of the first plurality of connection nodes. An input transistor has a control terminal coupled to a corresponding one of the second plurality of connection nodes, a current input terminal configured to provide a bias tuning for the DA, and a third current output terminal coupled to a control terminal of the main transistor and configured to provide a separate bias tuning for the DA.

Abstract: Disclosed is an active photonic device having a Darlington configuration with a substrate and a collector layer that is over the substrate. The collector layer includes an inner collector region. An outer collector region substantially surrounds the inner collector region and is spaced apart from the inner collector region. A base layer is over the collector layer. A first outer base region and a second outer base region substantially surround the inner base region and are spaced apart from the inner base region and each other. An emitter layer is over the base layer. The emitter layer includes an inner emitter region that is ring-shaped and resides over and extends substantially around an outer periphery of the inner base region. A first outer emitter region and a second outer emitter region substantially surround the inner emitter region and are spaced apart from the inner emitter region and each other.