Patents by Inventor Kewei Zuo
Kewei Zuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8945983Abstract: A method embodiment includes forming a packaging unit by attaching a die to a packaging substrate, applying plasma treatment to a first portion of the packaging substrate, wherein the first portion corresponds to a portion of the packaging substrate underneath the die, not applying plasma treatment to a second portion of the packaging substrate, wherein the second portion of the packaging substrate surrounds the first portion of the packaging substrate, and applying an underfill material over the first portion of the packaging substrate.Type: GrantFiled: March 15, 2013Date of Patent: February 3, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yen-Hsin Liu, Cing He Chen, Kewei Zuo, Chien Rhone Wang
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Patent number: 8905124Abstract: A temperature controlled loadlock chamber for use in semiconductor processing is provided. The temperature controlled loadlock chamber may include one or more of an adjustable fluid pump, mass flow controller, one or more temperature sensors, and a controller. The adjustable fluid pump provides fluid having a predetermined temperature to a temperature-controlled plate. The mass flow controller provides gas flow into the chamber that may also aid in maintaining a desired temperature. Additionally, one or more temperature sensors may be combined with the adjustable fluid pump and/or the mass flow controller to provide feedback and to provide a greater control over the temperature. A controller may be added to control the adjustable fluid pump and the mass flow controller based upon temperature readings from the one or more temperature sensors.Type: GrantFiled: June 27, 2007Date of Patent: December 9, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Hsien Lin, Jyh-Cherng Sheu, Ming-Feng Yoo, Kewei Zuo
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Publication number: 20140183760Abstract: A method embodiment includes forming a packaging unit by attaching a die to a packaging substrate, applying plasma treatment to a first portion of the packaging substrate, wherein the first portion corresponds to a portion of the packaging substrate underneath the die, not applying plasma treatment to a second portion of the packaging substrate, wherein the second portion of the packaging substrate surrounds the first portion of the packaging substrate, and applying an underfill material over the first portion of the packaging substrate.Type: ApplicationFiled: March 15, 2013Publication date: July 3, 2014Inventors: Yen-Hsin Liu, Cing He Chen, Kewei Zuo, Chien Rhone Wang
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Publication number: 20140088747Abstract: Embodiments of the present invention relate to a method for a near non-adaptive virtual metrology for wafer processing control. In accordance with an embodiment of the present invention, a method for processing control comprises diagnosing a chamber of a processing tool that processes a wafer to identify a key chamber parameter, and controlling the chamber based on the key chamber parameter if the key chamber parameter can be controlled, or compensating a prediction model by changing to a secondary prediction model if the key chamber parameter cannot be sufficiently controlled.Type: ApplicationFiled: April 25, 2013Publication date: March 27, 2014Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tzu-Yu Wang, Chen-Hua Yu, Chien Rhone Wang, Henry Lo, Jung Cheng Ko, Chih-Wei Lai, Kewei Zuo
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Patent number: 8682466Abstract: A method to enable wafer result prediction includes collecting manufacturing data from various semiconductor manufacturing tools and metrology tools; choosing key parameters using an autokey method based on the manufacturing data; building a virtual metrology based on the key parameters; and predicting wafer results using the virtual metrology.Type: GrantFiled: February 5, 2008Date of Patent: March 25, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Francis Ko, Chih-Wei Lai, Kewei Zuo, Henry Lo, Jean Wang, Ping-Hsu Chen, Chun-Hsien Lim, Chen-Hua Yu
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Publication number: 20140011301Abstract: The present disclosure provides one embodiment of an integrated circuit (IC) fabrication method to form an IC structure having one or more through silicon via (TSV) features. The IC fabrication method includes performing a plurality of processing steps; collecting physical metrology data from the plurality of processing steps; collecting virtual metrology data from the plurality of processing steps based on the physical metrology data; generating a yield prediction to the IC structure based on the physical metrology data and the virtual metrology data; and identifying an action at an earlier processing step based on the yield prediction.Type: ApplicationFiled: July 6, 2012Publication date: January 9, 2014Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chien Rhone Wang, Kewei Zuo, Chen-Hua Yu, Jing-Cheng Lin, Yen-Hsin Liu
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Publication number: 20130244346Abstract: Packaging methods, material dispensing methods and apparatuses, and automatic measurement systems are disclosed. In one embodiment, a method of packaging semiconductor devices includes coupling a second die to a top surface of a first die, dispensing a first amount of underfill material between the first die and the second die, and capturing an image of the underfill material. Based on the image captured, a second amount or no additional amount of underfill material is dispensed between the first die and the second die.Type: ApplicationFiled: March 14, 2012Publication date: September 19, 2013Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien Rhone Wang, Chih-Wei Lai, Chih-Chiang Chang, Kewei Zuo, Jing-Cheng Lin
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Patent number: 8433434Abstract: Embodiments of the present invention relate to a method for a near non-adaptive virtual metrology for wafer processing control. In accordance with an embodiment of the present invention, a method for processing control comprises diagnosing a chamber of a processing tool that processes a wafer to identify a key chamber parameter, and controlling the chamber based on the key chamber parameter if the key chamber parameter can be controlled, or compensating a prediction model by changing to a secondary prediction model if the key chamber parameter cannot be sufficiently controlled.Type: GrantFiled: April 23, 2010Date of Patent: April 30, 2013Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Amy Wang, Chen-Hua Yu, Jean Wang, Henry Lo, Francis Ko, Chih-Wei Lai, Kewei Zuo
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Publication number: 20120175403Abstract: In a reflow process, a plurality of solder bumps between a first workpiece and a second workpiece is melted. During a solidification stage of the plurality of solder bumps, the plurality of solder bumps is cooled at a first cooling rate. After the solidification stage is finished, the plurality of solder bumps is cooled at a second cooling rate lower than the first cooling rate.Type: ApplicationFiled: January 10, 2011Publication date: July 12, 2012Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Hua Yu, Wen-Yao Chang, Chien Rhone Wang, Kewei Zuo, Chung-Shi Liu
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Patent number: 7972969Abstract: A method is provided for controlling substrate thickness. At least one etchant is dispensed from at least one dispenser to a plurality of different locations on a surface of a spinning substrate to perform etching. A thickness of the spinning substrate is monitored at the plurality of locations, so that the thickness of the substrate is monitored at each individual location while dispensing the etchant at that location. A respective amount of etching performed at each individual location is controlled, based on the respective monitored thickness at that location.Type: GrantFiled: March 6, 2008Date of Patent: July 5, 2011Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ku-Feng Yang, Wen-Chih Chiou, Weng-Jin Wu, Kewei Zuo
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Patent number: 7974728Abstract: A system, method, and computer readable medium for extracting a key process parameter correlative to a selected device parameter are provided. In an embodiment, the key process parameter is determined using a gene map analysis. The gene map analysis includes grouping highly correlative process parameter and determining the correlation of a group to the selected device parameter. In an embodiment, the groups having greatest correlation to the selected device parameter are displayed in a correlation matrix and/or a gene map.Type: GrantFiled: February 5, 2008Date of Patent: July 5, 2011Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Hsien Lin, Francis Ko, Kewei Zuo, Henry Lo, Jean Wang
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Publication number: 20110060441Abstract: A first embodiment is a method for semiconductor process control comprising clustering processing tools of a processing stage into a tool cluster based on processing data and forming a prediction model for processing a semiconductor wafer based on the tool cluster. A second embodiment is a method for semiconductor process control comprising providing cluster routes between first stage tool clusters and second stage tool clusters, assigning a comparative optimization ranking to each cluster route, and scheduling processing of wafers. The comparative optimization ranking identifies comparatively which cluster routes provide for high wafer processing uniformity.Type: ApplicationFiled: July 7, 2010Publication date: March 10, 2011Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Francis Ko, Tzu-Yu Wang, Kewei Zuo, Henry Lo, Jean Wang, Chih-Wei Lai
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Publication number: 20110009998Abstract: Embodiments of the present invention relate to a method for a near non-adaptive virtual metrology for wafer processing control. In accordance with an embodiment of the present invention, a method for processing control comprises diagnosing a chamber of a processing tool that processes a wafer to identify a key chamber parameter, and controlling the chamber based on the key chamber parameter if the key chamber parameter can be controlled, or compensating a prediction model by changing to a secondary prediction model if the key chamber parameter cannot be sufficiently controlled.Type: ApplicationFiled: April 23, 2010Publication date: January 13, 2011Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Amy Wang, Chen-Hua Yu, Jean Wang, Henry Lo, Francis Ko, Chih-Wei Lai, Kewei Zuo
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Publication number: 20090227047Abstract: A method is provided for controlling substrate thickness. At least one etchant is dispensed from at least one dispenser to a plurality of different locations on a surface of a spinning substrate to perform etching. A thickness of the spinning substrate is monitored at the plurality of locations, so that the thickness of the substrate is monitored at each individual location while dispensing the etchant at that location. A respective amount of etching performed at each individual location is controlled, based on the respective monitored thickness at that location.Type: ApplicationFiled: March 6, 2008Publication date: September 10, 2009Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Ku-Feng Yang, Wen-Chih Chiou, Weng-Jin Wu, Kewei Zuo
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Publication number: 20090000769Abstract: A temperature controlled loadlock chamber for use in semiconductor processing is provided. The temperature controlled loadlock chamber may include one or more of an adjustable fluid pump, mass flow controller, one or more temperature sensors, and a controller. The adjustable fluid pump provides fluid having a predetermined temperature to a temperature-controlled plate. The mass flow controller provides gas flow into the chamber that may also aid in maintaining a desired temperature. Additionally, one or more temperature sensors may be combined with the adjustable fluid pump and/or the mass flow controller to provide feedback and to provide a greater control over the temperature. A controller may be added to control the adjustable fluid pump and the mass flow controller based upon temperature readings from the one or more temperature sensors.Type: ApplicationFiled: June 27, 2007Publication date: January 1, 2009Inventors: Chun-Hsien Lin, Jyh-Cherng Sheu, Ming-Feng Yoo, Kewei Zuo
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Publication number: 20080304944Abstract: A semiconductor manufacturing line includes an inert environment selected from the group consisting essentially of an inert airtight wafer holder, an inert wafer transport channel, an inert production tool, an inert clean room, and combinations thereof.Type: ApplicationFiled: June 29, 2007Publication date: December 11, 2008Inventors: Chien-Ming Sung, Simon Wang, Jia-Ren Chen, Henry Lo, Chen-Hua Yu, Jean Wang, Kewei Zuo
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Publication number: 20080275586Abstract: A method to enable wafer result prediction includes collecting manufacturing data from various semiconductor manufacturing tools and metrology tools; choosing key parameters using an autokey method based on the manufacturing data; building a virtual metrology based on the key parameters; and predicting wafer results using the virtual metrology.Type: ApplicationFiled: February 5, 2008Publication date: November 6, 2008Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Francis Ko, Chih-Wei Lai, Kewei Zuo, Henry Lo, Jean Wang, Ping-Hsu Chen, Chun-Hsien Lin, Chen-Hua Yu
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Publication number: 20080275585Abstract: A system, method, and computer readable medium for extracting a key process parameter correlative to a selected device parameter are provided. In an embodiment, the key process parameter is determined using a gene map analysis. The gene map analysis includes grouping highly correlative process parameter and determining the correlation of a group to the selected device parameter. In an embodiment, the groups having greatest correlation to the selected device parameter are displayed in a correlation matrix and/or a gene map.Type: ApplicationFiled: February 5, 2008Publication date: November 6, 2008Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chun-Hsien Lin, Francis Ko, Kewei Zuo, Henry Lo, Jean Wang