Patents by Inventor Khaldoon S. Abugharbieh

Khaldoon S. Abugharbieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9337138
    Abstract: An embodiment of an apparatus to reduce supply voltage noise with capacitors of an interposer of a stacked die is disclosed. In this embodiment, an interposer is coupled to a first integrated circuit die using a first plurality of interconnects. A substrate is coupled to the interposer using a second plurality of interconnects. The substrate includes a supply voltage plane and a ground plane, each of which is coupled to the first integrated circuit die using the second plurality of interconnects, the interposer, and the first plurality of interconnects. The interposer includes capacitors coupled in parallel using the supply voltage plane, the ground plane, and the second plurality of interconnects, where capacitance from capacitors of the interposer is provided to the first integrated circuit die using the supply voltage plane and the ground plane of the substrate.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: May 10, 2016
    Assignee: XILINX, INC.
    Inventors: Khaldoon S. Abugharbieh, Gregory Meredith, Christopher P. Wyland, Paul Y. Wu, Henley Liu, Sanjiv Stokes, Yong Wang
  • Patent number: 9003221
    Abstract: An embodiment for skew compensation for a stacked die is disclosed. For an embodiment of an apparatus, an interposer has a first and a second integrated circuit die coupled to the interposer. The first integrated circuit die includes an information generator, a signal delay compensator, and an input/output block. The information generator is configured to determine: a first delay value for a first path of the interposer between the first integrated circuit die and the second integrated circuit die; a second delay value for a second path of the interposer between the first integrated circuit die and the second integrated circuit die; and a difference between the first delay value and the second delay value. The signal delay compensator is coupled to receive the difference and configured to adjust a parameter of the first integrated circuit die to reduce the difference.
    Type: Grant
    Filed: April 3, 2012
    Date of Patent: April 7, 2015
    Assignee: Xilinx, Inc.
    Inventors: Khaldoon S. Abugharbieh, Daniel J. Ferris, III, Loren Jones, Austin H. Lesea
  • Patent number: 8838056
    Abstract: A receiver circuit includes an analog front-end circuit, a first adaptation circuit, and a second adaptation circuit. A method operates the receiver circuit. The analog front-end circuit is configured to resolve an output signal from an input signal as a function of adjustable parameters. The first adaptation circuit is coupled to the analog front-end circuit and is configured to determine values of the adjustable parameters responsive to the output signal. The second adaptation circuit is coupled to the analog front-end circuit and to the first adaptation circuit. The second adaptation circuit is configured to adjust the values of the adjustable parameters responsive to one or more operating conditions of the receiver circuit. These operating conditions include a temperature and/or a power supply voltage of the receiver circuit.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: September 16, 2014
    Assignee: Xilinx, Inc.
    Inventors: Mustansir Fanaswalla, Khaldoon S. Abugharbieh, David L. Ferguson
  • Patent number: 8638084
    Abstract: An embodiment of a method for providing a bandgap voltage is described. In such an embodiment, current density of a current in a bandgap circuit is shifted into a current density range having at least a substantially stable scaling factor to enhance temperature stability of the bandgap voltage, and the bandgap voltage output is moved to a target voltage.
    Type: Grant
    Filed: October 22, 2010
    Date of Patent: January 28, 2014
    Assignee: Xilinx, Inc.
    Inventors: Khaldoon S. Abugharbieh, Ying Cao, Geoffrey Richmond
  • Patent number: 8446169
    Abstract: An embodiment of an impedance adjustment apparatus is disclosed. For this embodiment of an impedance adjustment apparatus, a differential driver circuit has an input port, a first output port, a second output port, a first bias node, and a second bias node. A first impedance-voltage device is coupled to provide a first bias voltage to the first bias node. A second impedance-voltage device is coupled to provide a second bias voltage to the second bias node. A first analog voltage source is coupled to provide a first analog voltage to the first impedance-voltage device, and a second analog voltage source is coupled to provide a second analog voltage to the second impedance-voltage device.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: May 21, 2013
    Assignee: Xilinx, Inc.
    Inventors: Mark J. Marlett, Khaldoon S. Abugharbieh
  • Patent number: 8358156
    Abstract: In one embodiment of the invention, a voltage-mode line driver circuit is provided for transmitting a differential signal. The voltage-mode line driver includes a first voltage swing circuit having an input coupled to receive an input signal and an output coupled to a first transmission line. A second voltage swing circuit is included, the second voltage swing circuit having an input coupled to receive an inversion of the input signal and an output coupled to a second transmission line. First and second pre-emphasis circuits are respectively coupled to the first and second voltage swing circuits. The first and second pre-emphasis circuits are configured to supplement the slew rate of respective first and second voltage swing circuits in response to a transition of the input signal.
    Type: Grant
    Filed: May 28, 2010
    Date of Patent: January 22, 2013
    Assignee: Xilinx, Inc.
    Inventors: Khaldoon S. Abugharbieh, Mark J. Marlett
  • Publication number: 20130002410
    Abstract: A receiver circuit includes an analog front-end circuit, a first adaptation circuit, and a second adaptation circuit. A method operates the receiver circuit. The analog front-end circuit is configured to resolve an output signal from an input signal as a function of adjustable parameters. The first adaptation circuit is coupled to the analog front-end circuit and is configured to determine values of the adjustable parameters responsive to the output signal. The second adaptation circuit is coupled to the analog front-end circuit and to the first adaptation circuit. The second adaptation circuit is configured to adjust the values of the adjustable parameters responsive to one or more operating conditions of the receiver circuit. These operating conditions include a temperature and/or a power supply voltage of the receiver circuit.
    Type: Application
    Filed: June 28, 2011
    Publication date: January 3, 2013
    Applicant: XILINX, INC.
    Inventors: Mustansir Fanaswalla, Khaldoon S. Abugharbieh, David L. Ferguson
  • Patent number: 6510487
    Abstract: The present invention provides an integrated parallel and serial programming interface that can be selected between either a parallel programming mode or a serial programming mode. The present invention provides a control logic circuit for selecting between the parallel and serial modes. The present invention also includes a parallel and serial detection circuit. The control logic sends a signal to an interface circuit that selects between a serial programming mode and a parallel programming mode based on the outputs of the parallel and serial detection circuits.
    Type: Grant
    Filed: January 24, 1996
    Date of Patent: January 21, 2003
    Assignee: Cypress Semiconductor Corp.
    Inventors: S. Babar Raza, Anita X. Meng, Donald A. Krall, Khaldoon S. Abugharbieh, Roger J. Bettman