Abstract: A method of bridging a plurality of buses within a bus bridge can include determining whether a queue of the bus bridge includes a transaction request directed to a restricted address range and, for each received transaction request, determining whether an address to which the transaction request is directed is within the restricted address range. Each transaction request received by the bus bridge can be selectively rejected according to whether the address to which the transaction request is directed is within the restricted address range and whether the queue includes a transaction request directed to the restricted address range.

Abstract: A programmable logic device (PLD) includes a central processing unit (CPU) and a programmable interface coupled to the CPU, wherein the programmable interface includes a core designated by a user. The programmable interface core allows devices, both on and off-chip, to communicate with the CPU. In one embodiment, the programmable interface core includes a crosspoint switch for coupling a plurality of devices and the CPU. Re-programmability of the PLD provides significant flexibility in providing features that can be parameterized based on the user's needs and/or associated design. Specifically, these parameterized features can be implemented in programmable resources on the PLD, thereby allowing these features to be modified at any time. Moreover, only those resources actually needed for the programmable interface core need be implemented, thereby allowing the user to optimize use of the remainder of the PLD.

Abstract: A programmable logic device (PLD) includes a central processing unit (CPU) and a programmable interface coupled to the CPU, wherein the programmable interface includes a core designated by a user. The programmable interface core allows devices, both on and off-chip, to communicate with the CPU. In one embodiment, the programmable interface core includes a crosspoint switch for coupling a plurality of devices and the CPU. Re-programmability of the PLD provides significant flexibility in providing features that can be parameterized based on the user's needs and/or associated design. Specifically, these parameterized features can be implemented in programmable resources on the PLD, thereby allowing these features to be modified at any time. Moreover, only those resources actually needed for the programmable interface core need be implemented, thereby allowing the user to optimize use of the remainder of the PLD.

Abstract: A programmable logic device (PLD) includes a central processing unit (CPU) and a programmable interface coupled to the CPU, wherein the programmable interface includes a core designated by a user. The programmable interface core allows devices, both on and off-chip, to communicate with the CPU. In one embodiment, the programmable interface core includes a crosspoint switch for coupling a plurality of devices and the CPU. Re-programmability of the PLD provides significant flexibility in providing features that can be parameterized based on the user's needs and/or associated design. Specifically, these parameterized features can be implemented in programmable resources on the PLD, thereby allowing these features to be modified at any time. Moreover, only those resources actually needed for the programmable interface core need be implemented, thereby allowing the user to optimize use of the remainder of the PLD.