Abstract: A device includes, in one embodiment, first and second patch antennas. The first patch antenna is disposed at a dielectric substrate, and defines a first principle plane. The second patch antenna is disposed at the dielectric substrate, and defines a second principle plane, an orientation of the second principle plane being different from an orientation of the first principle plane. A switch is coupled to the first patch antenna and to the second patch antenna, the switch to select between operation of the first patch antenna and operation of the second patch antenna.

Abstract: An encoded message is stored in a first memory. The encoded message is retrieved from the first memory as a retrieved encoded message that may contain an error. Syndromes are generated from the retrieved encoded message. The syndromes are used to determine if the retrieved encoded message has an error. Polynomial coefficients are generated for establishing a polynomial equation having a first number of solutions. The polynomial equation is solved only for a second number of solutions. The first number is greater than the second number. The second number of solutions comprises solutions corresponding to locations in the retrieved encoded message. Each location is corrected in the retrieved encoded message that corresponds to a solution of zero of the polynomial equation. The result is efficient error correction.

Abstract: A device includes, in one embodiment, first and second patch antennas. The first patch antenna is disposed at a dielectric substrate, and defines a first principle plane. The second patch antenna is disposed at the dielectric substrate, and defines a second principle plane, an orientation of the second principle plane being different from an orientation of the first principle plane. A switch is coupled to the first patch antenna and to the second patch antenna, the switch to select between operation of the first patch antenna and operation of the second patch antenna.

Abstract: A Multi-Execution Flash Processor core performs operations associated with accessing non-volatile semiconductor based memory units. Execution units included in the core can execute instructions requiring different numbers of clock cycles to complete by generating an event control signal in response to completing an instruction. The core can be used in a controller to access and control external memory units. Data memory access operations include using an instruction decoder to select one or more execution units to perform an operation associated with the instruction, and generating an event control signal upon completion of the operation. In some cases, executing the instruction includes selecting a second execution unit.

Abstract: An encoded message is stored in a first memory. The encoded message is retrieved from the first memory as a retrieved encoded message that may contain an error. Syndromes are generated from the retrieved encoded message. The syndromes are used to determine if the retrieved encoded message has an error. Polynomial coefficients are generated for establishing a polynomial equation having a first number of solutions. The polynomial equation is solved only for a second number of solutions. The first number is greater than the second number. The second number of solutions comprises solutions corresponding to locations in the retrieved encoded message. Each location is corrected in the retrieved encoded message that corresponds to a solution of zero of the polynomial equation. The result is efficient error correction.