Patents by Inventor Kie Y. Ahn
Kie Y. Ahn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9929229Abstract: Various embodiments includes a stacked open pattern inductor fabricated above a semiconductor substrate. The stacked open pattern inductor includes a plurality of parallel open conducting patterns embedded in a magnetic oxide or in an insulator and a magnetic material. A layer of magnetic material may be located above the inductor and below the inductor to confine electronic noise generated in the stacked open pattern inductor to the area occupied by the inductor. The stacked open pattern inductor may include a magnetic material directly contacts one of the conducting patterns and the substrate. The stacked open pattern inductor may be fabricated using conventional integrated circuit manufacturing processes, and the inductor may be used in connection with computer systems.Type: GrantFiled: August 26, 2011Date of Patent: March 27, 2018Assignee: Micron Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes
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Patent number: 9583334Abstract: Electronic apparatus and methods of forming the electronic apparatus include a gallium lanthanide oxide film for use in a variety of electronic systems. The gallium lanthanide oxide film may be structured as one or more monolayers. The gallium lanthanide oxide film may be formed using atomic layer deposition.Type: GrantFiled: September 3, 2015Date of Patent: February 28, 2017Assignee: Micron Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes
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Patent number: 9553177Abstract: Methods, devices, and systems for using and forming vertically base-connected bipolar transistors have been shown. The vertically base-connected bipolar transistors in the embodiments of the present disclosure are formed with a CMOS fabrication technique that decreases the transistor size while maintaining the high performance characteristics of a bipolar transistor.Type: GrantFiled: June 18, 2015Date of Patent: January 24, 2017Assignee: Micron Technology, Inc.Inventors: Badih El-Kareh, Leonard Forbes, Kie Y. Ahn
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Patent number: 9502256Abstract: Atomic layer deposition (ALD) can be used to form a dielectric layer of zirconium aluminum oxynitride (ZrAlON) for use in a variety of electronic devices. Forming the dielectric layer may include depositing zirconium oxide using atomic layer deposition and precursor chemicals, followed by depositing aluminum nitride using precursor chemicals, and repeating. The dielectric layer may be used as the gate insulator of a MOSFET, a capacitor dielectric, and a tunnel gate insulator in flash memories.Type: GrantFiled: January 7, 2016Date of Patent: November 22, 2016Assignee: Micron Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes
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Patent number: 9356112Abstract: A dielectric structure may be arranged having a thin nitrided surface of an insulator with a charge blocking insulator over the nitrided surface. The insulator may be formed of a number of different insulating materials such as a metal oxide, a metal oxycarbide, a semiconductor oxide, or oxycarbide. In an embodiment, the dielectric structure may be formed by nitridation of a surface of an insulator using ammonia and deposition of a blocking insulator having a larger band gap than the insulator. The dielectric structure may form part of a memory device, as well as other devices and systems.Type: GrantFiled: October 20, 2014Date of Patent: May 31, 2016Assignee: Micron Technology, Inc.Inventors: Leonard Forbes, Kie Y. Ahn
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Publication number: 20160118259Abstract: Atomic layer deposition (ALD) can be used to form a dielectric layer of zirconium aluminum oxynitride (ZrAlON) for use in a variety of electronic devices. Forming the dielectric layer may include depositing zirconium oxide using atomic layer deposition and precursor chemicals, followed by depositing aluminum nitride using precursor chemicals, and repeating. The dielectric layer may be used as the gate insulator of a MOSFET, a capacitor dielectric, and a tunnel gate insulator in flash memories.Type: ApplicationFiled: January 7, 2016Publication date: April 28, 2016Inventors: Kie Y. Ahn, Leonard Forbes
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Patent number: 9252281Abstract: A monolayer or partial monolayer sequencing processing, such as atomic layer deposition (ALD), can be used to form a semiconductor structure of a silicon film on a germanium substrate. Such structures may be useful in high performance electronic devices. A structure may be formed by deposition of a thin silicon layer on a germanium substrate surface, forming a hafnium oxide dielectric layer, and forming a tantalum nitride electrode. The properties of the dielectric may be varied by replacing the hafnium oxide with another dielectric such as zirconium oxide or titanium oxide.Type: GrantFiled: May 28, 2014Date of Patent: February 2, 2016Assignee: Micron Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes
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Patent number: 9236245Abstract: Atomic layer deposition (ALD) can be used to form a dielectric layer of zirconium aluminum oxynitride (ZrAlON) for use in a variety of electronic devices. Forming the dielectric layer may include depositing zirconium oxide using atomic layer deposition and precursor chemicals, followed by depositing aluminum nitride using precursor chemicals, and repeating. The dielectric layer may be used as the gate insulator of a MOSFET, a capacitor dielectric, and a tunnel gate insulator in flash memories.Type: GrantFiled: March 20, 2015Date of Patent: January 12, 2016Assignee: Micron Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes
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Patent number: 9231047Abstract: Methods of forming and the resulting capacitors formed by these methods are shown. Monolayers that contain praseodymium are deposited onto a substrate and subsequently processed to form praseodymium oxide dielectrics. Monolayers that contain titanium or other metals are deposited onto a substrate and subsequently processed to form metal electrodes. Resulting capacitor structures includes properties such as improved dimensional control. One improved dimensional control includes thickness. Some resulting capacitor structures also include properties such as an amorphous or nanocrystalline microstructure. Selected components of capacitors formed with these methods have better step coverage over substrate topography and more robust film mechanical properties.Type: GrantFiled: October 20, 2014Date of Patent: January 5, 2016Assignee: Micron Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes, Arup Bhattacharyya
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Publication number: 20150380240Abstract: Electronic apparatus and methods of forming the electronic apparatus include a gallium lanthanide oxide film for use in a variety of electronic systems. The gallium lanthanide oxide film may be structured as one or more monolayers. The gallium lanthanide oxide film may be formed using atomic layer deposition.Type: ApplicationFiled: September 3, 2015Publication date: December 31, 2015Inventors: Kie Y. Ahn, Leonard Forbes
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Patent number: 9202686Abstract: Apparatus and methods of forming the apparatus include a dielectric layer containing barium strontium titanium oxide layer, an erbium-doped barium strontium titanium oxide layer, or a combination thereof. Embodiments of methods of fabricating such dielectric layers provide dielectric layers for use in a variety of devices. Embodiments include forming barium strontium titanium oxide film using atomic layer deposition. Embodiments include forming erbium-doped barium strontium titanium oxide film using atomic layer deposition.Type: GrantFiled: November 8, 2013Date of Patent: December 1, 2015Assignee: Micron Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes
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Publication number: 20150287815Abstract: Methods, devices, and systems for using and forming vertically base-connected bipolar transistors have been shown. The vertically base-connected bipolar transistors in the embodiments of the present disclosure are formed with a CMOS fabrication technique that decreases the transistor size while maintaining the high performance characteristics of a bipolar transistor.Type: ApplicationFiled: June 18, 2015Publication date: October 8, 2015Inventors: Badih El-Kareh, Leonard Forbes, Kie Y. Ahn
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Patent number: 9129961Abstract: Electronic apparatus and methods of forming the electronic apparatus include a gallium lanthanide oxide film for use in a variety of electronic systems. The gallium lanthanide oxide film may be structured as one or more monolayers. The gallium lanthanide oxide film may be formed using atomic layer deposition.Type: GrantFiled: July 1, 2011Date of Patent: September 8, 2015Assignee: Micron Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes
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Publication number: 20150194299Abstract: Atomic layer deposition (ALD) can be used to form a dielectric layer of zirconium aluminum oxynitride (ZrAlON) for use in a variety of electronic devices. Forming the dielectric layer may include depositing zirconium oxide using atomic layer deposition and precursor chemicals, followed by depositing aluminum nitride using precursor chemicals, and repeating. The dielectric layer may be used as the gate insulator of a MOSFET, a capacitor dielectric, and a tunnel gate insulator in flash memories.Type: ApplicationFiled: March 20, 2015Publication date: July 9, 2015Inventors: Kie Y. Ahn, Leonard Forbes
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Patent number: 9076835Abstract: Methods, devices, and systems for using and forming vertically base-connected bipolar transistors have been shown. The vertically base-connected bipolar transistors in the embodiments of the present disclosure are formed with a CMOS fabrication technique that decreases the transistor size while maintaining the high performance characteristics of a bipolar transistor.Type: GrantFiled: April 2, 2013Date of Patent: July 7, 2015Assignee: Micron Technology, Inc.Inventors: Badih El-Kareh, Leonard Forbes, Kie Y. Ahn
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Patent number: 9064866Abstract: A metal oxide semiconductor (MOS) structure having a high dielectric constant gate insulator layer containing gold (Au) nano-particles is presented with methods for forming the layer with high step coverage of underlying topography, high surface smoothness, and uniform thickness. The transistor may form part of a logic device, a memory device, a persistent memory device, a capacitor, as well as other devices and systems. The insulator layer may be formed using atomic layer deposition (ALD) to reduce the overall device thermal exposure. The insulator layer may be formed of a metal oxide, a metal oxycarbide, a semiconductor oxide, or semiconductor oxide oxycarbide, and the gold nano-particles in insulator layer increase the work function of the insulator layer and affect the tunneling current and the threshold voltage of the transistor.Type: GrantFiled: February 1, 2013Date of Patent: June 23, 2015Assignee: Micro Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes
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Patent number: 8993455Abstract: Atomic layer deposition (ALD) can be used to form a dielectric layer of zirconium aluminum oxynitride (ZrAlON) for use in a variety of electronic devices. Forming the dielectric layer may include depositing zirconium oxide using atomic layer deposition and precursor chemicals, followed by depositing aluminum nitride using precursor chemicals, and repeating. The dielectric layer may be used as the gate insulator of a MOSFET, a capacitor dielectric, and a tunnel gate insulator in flash memories.Type: GrantFiled: May 28, 2010Date of Patent: March 31, 2015Assignee: Micron Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes
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Patent number: 8951880Abstract: Electronic apparatus and methods of forming the electronic apparatus may include one or more insulator layers having a refractory metal and a non-refractory metal for use in a variety of electronic systems and devices. Embodiments can include electronic apparatus and methods of forming the electronic apparatus having a tantalum aluminum oxynitride film. The tantalum aluminum oxynitride film may be structured as one or more monolayers. The tantalum aluminum oxynitride film may be formed using atomic layer deposition. Metal electrodes may be disposed on a dielectric containing a tantalum aluminum oxynitride film.Type: GrantFiled: July 3, 2014Date of Patent: February 10, 2015Assignee: Micron Technology, Inc.Inventors: Leonard Forbes, Kie Y. Ahn, Arup Bhattacharyya
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Publication number: 20150035119Abstract: Methods of forming and the resulting capacitors formed by these methods are shown. Monolayers that contain praseodymium are deposited onto a substrate and subsequently processed to form praseodymium oxide dielectrics. Monolayers that contain titanium or other metals are deposited onto a substrate and subsequently processed to form metal electrodes. Resulting capacitor structures includes properties such as improved dimensional control. One improved dimensional control includes thickness. Some resulting capacitor structures also include properties such as an amorphous or nanocrystalline microstructure. Selected components of capacitors formed with these methods have better step coverage over substrate topography and more robust film mechanical properties.Type: ApplicationFiled: October 20, 2014Publication date: February 5, 2015Inventors: Kie Y. Ahn, Leonard Forbes, Arup Bhattacharyya
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Publication number: 20150035043Abstract: A dielectric structure may be arranged having a thin nitrided surface of an insulator with a charge blocking insulator over the nitrided surface. The insulator may be formed of a number of different insulating materials such as a metal oxide, a metal oxycarbide, a semiconductor oxide, or oxycarbide. In an embodiment, the dielectric structure may be formed by nitridation of a surface of an insulator using ammonia and deposition of a blocking insulator having a larger band gap than the insulator. The dielectric structure may form part of a memory device, as well as other devices and systems.Type: ApplicationFiled: October 20, 2014Publication date: February 5, 2015Inventors: Leonard Forbes, Kie Y. Ahn