Patents by Inventor Kim J. Watt

Kim J. Watt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5072356
    Abstract: A drum-type sequencer operable in a ladder logic program and capable of being selectively stepped in various modes; that is, in forward stepped sequence, non-sequentially, and backwardly.
    Type: Grant
    Filed: April 2, 1990
    Date of Patent: December 10, 1991
    Assignee: Square D Company
    Inventors: Kim J. Watt, Charles C. Ksicinski, Gary A. Romanowich, Richard L. Ryan
  • Patent number: 4992926
    Abstract: A communication network for programmable logic controllers (PLC) wherein selected memory means of each PLC has at least two ports directly accessible by other PLC and certain registers of the PLC are identical. Each PLC further has an interblock gap timer to signal the PLC when its transmit time slice is to occur. The time slice consists of a block transmit time and an interblock gap time. The total update time has been optimized to engable efficient, high-speed transfer of blocks of data between the PLCs.
    Type: Grant
    Filed: October 17, 1988
    Date of Patent: February 12, 1991
    Assignee: Square D Company
    Inventors: Donald R. Janke, Kim J. Watt, Dirk I. Gates, Joseph T. Bronikowski
  • Patent number: 4897777
    Abstract: A communication network for programmable logic controllers (PLCs) wherein selected memory means of each PLC have at least two ports directly accessible by other PLCs and certain registers of the PLCs are identical to enable efficient, high-speed transfer of blocks of data between the PLCs.
    Type: Grant
    Filed: April 11, 1988
    Date of Patent: January 30, 1990
    Assignee: Square D Company
    Inventors: Donald R. Janke, Kim J. Watt, Dirk I. Gates
  • Patent number: RE36263
    Abstract: A communication network for programmable logic controllers (PLCs) wherein selected memory means of each PLC have at least two ports directly accessible by other PLCs and certain registers of the PLCs are identical to enable efficient, high-speed transfer of blocks of data between the PLCs.
    Type: Grant
    Filed: May 14, 1996
    Date of Patent: August 3, 1999
    Assignee: Schneider Automation, Inc.
    Inventors: Donald R. Janke, Kim J. Watt, Dirk I. Gates