Patents by Inventor Kimberly Judy Lobo

Kimberly Judy Lobo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Cache management in a memory subsystem
    Patent number: 11954358
    Abstract: Methods, systems, and devices for cache management in a memory subsystem are described. An interface controller may include a first buffer and a second buffer. The interface controller may use the first and second buffers to facilitate operating a volatile memory as a cache for a non-volatile memory. During an access operation, the interface controller may use the buffer to transfer data between the volatile memory, non-volatile memory, and another device. In response to the access operation, the interface controller may use the second buffer to transfer second data from the volatile memory to the non-volatile memory.
    Type: Grant
    Filed: June 16, 2021
    Date of Patent: April 9, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Chinnakrishnan Ballapuram, Akhila Gundu, Taeksang Song, Kimberly Judy Lobo, Saira S. Malik
  • Cache metadata management
    Patent number: 11630781
    Abstract: Methods, systems, and devices for cache metadata management in a memory subsystem are described. The memory subsystem may include an interface controller coupled with a non-volatile memory and a volatile memory. The interface controller may use metadata, such as validity information and dirty information, to operate the volatile memory as cache. The interface controller may store the dirty information in the volatile memory and may store the validity information in an array in the interface controller.
    Type: Grant
    Filed: June 16, 2021
    Date of Patent: April 18, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Taeksang Song, Akhila Gundu, Kimberly Judy Lobo, Chinnakrishnan Ballapuram, Saira S. Malik
  • CACHE MANAGEMENT IN A MEMORY SUBSYSTEM
    Publication number: 20210397371
    Abstract: Methods, systems, and devices for cache management in a memory subsystem are described. An interface controller may include a first buffer and a second buffer. The interface controller may use the first and second buffers to facilitate operating a volatile memory as a cache for a non-volatile memory. During an access operation, the interface controller may use the buffer to transfer data between the volatile memory, non-volatile memory, and another device. In response to the access operation, the interface controller may use the second buffer to transfer second data from the volatile memory to the non-volatile memory.
    Type: Application
    Filed: June 16, 2021
    Publication date: December 23, 2021
    Inventors: Chinnakrishnan Ballapuram, Akhila Gundu, Taeksang Song, Kimberly Judy Lobo, Saira S. Malik
  • CACHE METADATA MANAGEMENT
    Publication number: 20210397561
    Abstract: Methods, systems, and devices for cache metadata management in a memory subsystem are described. The memory subsystem may include an interface controller coupled with a non-volatile memory and a volatile memory. The interface controller may use metadata, such as validity information and dirty information, to operate the volatile memory as cache. The interface controller may store the dirty information in the volatile memory and may store the validity information in an array in the interface controller.
    Type: Application
    Filed: June 16, 2021
    Publication date: December 23, 2021
    Inventors: Taeksang Song, Akhila Gundu, Kimberly Judy Lobo, Chinnakrishnan Ballapuram, Saira S. Malik