Patents by Inventor Kimito Horie
Kimito Horie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20100020964Abstract: Disclosed is a key generation apparatus which uses a finite commutative group defined by a number-theoretical (or arithmetical) function that can be substituted for the elliptic curve, thereby enabling the computational difficulty equivalent to that of breaking the elliptic curve cryptography. The key generation apparatus comprises a key setting part and a key generator. The key setting part sets a secret key ?, and selects an element of the finite commutative group as a public key G. The key generator performs an addition operation defined for the finite commutative group on the public key G, thereby to multiply the public key G by the secret key ? representing a scalar coefficient to generate a public key Y. The finite commutative group is a set of pairs (x,y) of a dependent variable y of a quadratic-hyperbolic function defined on a finite ring and an independent variable x of the quadratic-hyperbolic function.Type: ApplicationFiled: December 21, 2007Publication date: January 28, 2010Applicant: OKI ELECTRIC INDUSTRY CO., LTD.Inventor: Kimito HORIE
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Patent number: 7447962Abstract: A plurality of input circuits and a plurality of output circuits are connected to form a Boundary Scan Path Chain (BSPC). Part or all of the existing I/O bus is used as a test bus. When a test target system such as a logic circuit is tested, data of the input circuits is circulated in the BSPC to set the initial state. After a system clock is activated, data of the input circuits is loaded into shift registers provided in the input circuits or data of the output circuits is loaded into shift registers provided in the output circuits. A shift clock is activated to extract the data of the input or output circuits through the BSPC. Enable data is circulated in the BSPC, and data of the output circuits is supplied to the test bus only when the enable data is active.Type: GrantFiled: October 21, 2005Date of Patent: November 4, 2008Assignee: Oki Electric Industry Co., Ltd.Inventor: Kimito Horie
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Publication number: 20070025703Abstract: A moving-picture reproducing system has a flat panel display, a flat panel speaker group provided at the front thereof, and low-audio speakers. A video reproducing device reproduces a video from a moving-picture file and displays the same on the flat panel display. An acoustic sound reproducing device reproduces an acoustic sound and allows the flat panel speaker group and the low-audio speakers to output the same. When acoustic data reproduced from the moving-picture file by the acoustic sound reproducing device are synthesized, the synthesized data is separated into a high-frequency audio range and a low-frequency audio range by a filter. The acoustic sound of the high-frequency audio range is played back by the flat panel speaker group, and the acoustic sound of the low-frequency audio range is played back by the low-audio speakers.Type: ApplicationFiled: June 28, 2006Publication date: February 1, 2007Applicant: OKI ELECTRIC INDUSTRY CO., LTD.Inventor: Kimito Horie
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Patent number: 7162557Abstract: A competition arbitration system in which chances for using a resource of a computer such as a bus or the like among devices are fair is provided. Pulses are sequentially generated periodically from a pulse generating circuit. It is assumed that first device outputted first bus request signal and second device continuously outputted second bus request signal before rising timing of the first pulse. When a bus arbiter outputs a bus grant signal to the first device at the rising timing of the first pulse, the bus master of the first device outputs a bus use acknowledgment signal. Then a use grant inhibiting circuit receives the acknowledgment signal and outputs an inhibition signal for inhibiting use of other devices. Thus, the first device holds the use right of a bus and bus use requests of other devices are reserved.Type: GrantFiled: April 15, 2002Date of Patent: January 9, 2007Assignee: Oki Electric Industry Co., Ltd.Inventors: Koichi Takeda, Kimito Horie
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Patent number: 7159004Abstract: An adder includes a first XOR element for generating an XOR output of the first and the second data inputs, a first multiplexer for selecting one of the first carry input or the first data input while the XOR output is made a selection signal, a second multiplexer for selecting one of the second carry input or the second data input, a third multiplexer for selecting one of the first or the second carry inputs while the carry selection input is made a selection signal, and a second XOR element for generating an XOR output of an output of the third multiplexer and the XOR output, and is characterized in that an output of the first multiplexer is made a first carry output, an output of the second multiplexer is made a second carry output, and an output of the third multiplexer is made an addition value.Type: GrantFiled: August 27, 2003Date of Patent: January 2, 2007Assignee: Oki Electric Industry Co., Ltd.Inventor: Kimito Horie
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Patent number: 7111032Abstract: A residue computing device on a Galois Field, for calculating a residue of a product of a multiplier factor and a multiplicand under a modulo, includes a gate for allowing the multiplier factor to pass therethrough when a leading bit of the multiplicand is 1, an adder for adding a temporary residue and a value obtained by the passage, a gate for allowing the modulo to pass therethrough when a leading bit of a summed value of the adder is 1, and a subtractor for subtracting the modulo from the summed value of the adder when the leading bit of the summed value is 1, wherein a process for setting a value obtained by shifting a subtracted value of the subtractor by one bit, as the temporary residue on the basis of the next clock is repeatedly performed for each clock to thereby calculate the residue.Type: GrantFiled: September 6, 2002Date of Patent: September 19, 2006Assignee: Oki Electric Industry Co., Ltd.Inventor: Kimito Horie
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Publication number: 20060156106Abstract: A plurality of input circuits and a plurality of output circuits are connected to form a Boundary Scan Path Chain (BSPC). Part or all of the existing I/O bus is used as a test bus. When a test target system such as a logic circuit is tested, data of the input circuits is circulated in the BSPC to set the initial state. After a system clock is activated, data of the input circuits is loaded into shift registers provided in the input circuits or data of the output circuits is loaded into shift registers provided in the output circuits. A shift clock is activated to extract the data of the input or output circuits through the BSPC. Enable data is circulated in the BSPC, and data of the output circuits is supplied to the test bus only when the enable data is active.Type: ApplicationFiled: October 21, 2005Publication date: July 13, 2006Inventor: Kimito Horie
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Patent number: 7073087Abstract: Transition signal control for creating asynchronous timing is provided using a transition signal control circuit, which includes Muller C elements each with an inverter. The control device is constituted by a machine ring including n-stages of transition signal control circuits, a state ring including k-stages of transition signal control circuits, and a synchronous circuit for synchronizing with the machine ring by receiving a vector which is output from the state ring. When the output vector of the state ring is received, the synchronous circuit outputs a vector to the machine ring. The output vector of the machine ring and the output vector of the state ring create timings for controlling the processor, for example, asynchronously, and these timings are input to the instruction decoder, for example.Type: GrantFiled: July 16, 2002Date of Patent: July 4, 2006Assignee: Oki Electric Industry Co., Ltd.Inventors: Kimito Horie, Koichi Takeda
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Patent number: 7060886Abstract: A music playback unit corrects the frequency characteristics of a speaker installed in a portable telephone, without using an equalizer. The musical score data is stored in a first memory, and data for correcting the velocity of musical score data for each velocity of each note is stored in a second memory. The sound generator driver reads the musical score data from the first memory, and reads the correction data from the second memory, and also corrects the velocity of the musical score data by substituting the musical score data and correction data in a predetermined calculation formula. The musical score data after the velocity is corrected is played by the MIDI sound generator, amplifier and speaker.Type: GrantFiled: July 16, 2003Date of Patent: June 13, 2006Assignee: Oki Electric Industry Co., Ltd.Inventors: Masao Tomizawa, Kaoru Tsukamoto, Tomohiro Iwanaga, Kimito Horie
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Patent number: 6975029Abstract: Disclosed is an inexpensive semiconductor device which has a built-in antenna capable of efficiently radiating low-power microwaves and has excellent productivity. An IC chip is mounted on a lead frame on which a chip base for mounting an IC chip, an inverted-F antenna and a ground electrode are integrated and is molded with an encapsulating resin. At this time, a gap portion, which is formed between the open end of the resonance portion of the inverted-F antenna and the distal end portion of the ground electrode, is not molded with the encapsulating resin and is left open as a window. This can permit electric waves to be efficiently irradiated from the open end of the antenna exposed to air through the window. As this semiconductor device has nearly the same structure as that of an ordinary semiconductor device, it is excellent in productivity and can be fabricated at a low cost.Type: GrantFiled: April 2, 2004Date of Patent: December 13, 2005Assignee: Oki Electric Industry Co., Ltd.Inventor: Kimito Horie
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Patent number: 6927706Abstract: A data compressing apparatus outputs character data and a pointer as intermediate data from input data. When a character string as a target of a command coincides with a character string as a target of the character data and a character string that is instructed by the pointer or by a combination thereof, a substituting means outputs a command in place of the character data or the pointer and outputs output data including the character data, the pointer, and the command. Accordingly, a data compressing apparatus is realized which can make free compression such that information or the like other than the character string is embedded.Type: GrantFiled: February 24, 2004Date of Patent: August 9, 2005Assignee: Oki Electric Industrial, Co., LTDInventor: Kimito Horie
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Patent number: 6922090Abstract: The present invention implements an asynchronous transition signaling circuit which can be applied to a bus arbitrator or the like. The OR gate holds a token (feedback signal S) as long as the device enabling signal Grant is output, even after the request event ReqIn is canceled, and as a result, the Muller C element with an inverter cancels the output of the response event AckOut. When the device request signal Req is not output, the feedback signal S passes through the AND gate, and the request event ReqOut is output from the AND gate. At the same time, the device enabling signal Grant is no longer output, and the loop comprised of the Muller C element with an inverter, the OR gate and the AND gate is canceled. As a result, the token (feedback signal S) is transferred to the next transition signaling circuit.Type: GrantFiled: March 12, 2002Date of Patent: July 26, 2005Assignee: Oki Electric Industry Co., Ltd.Inventors: Koichi Takeda, Kimito Horie
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Publication number: 20050093130Abstract: Disclosed is an inexpensive semiconductor device which has a built-in antenna capable of efficiently radiating low-power microwaves and has excellent productivity. An IC chip is mounted on a lead frame on which a chip base for mounting an IC chip, an inverted-F antenna and a ground electrode are integrated and is molded with an encapsulating resin. At this time, a gap portion, which is formed between the open end of the resonance portion of the inverted-F antenna and the distal end portion of the ground electrode, is not molded with the encapsulating resin and is left open as a window. This can permit electric waves to be efficiently irradiated from the open end of the antenna exposed to air through the window. As this semiconductor device has nearly the same structure as that of an ordinary semiconductor device, it is excellent in productivity and can be fabricated at a low cost.Type: ApplicationFiled: April 2, 2004Publication date: May 5, 2005Inventor: Kimito Horie
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Publication number: 20050076074Abstract: An adder includes a first XOR element for generating an XOR output of the first and the second data inputs, a first multiplexer for selecting one of the first carry input or the first data input while the XOR output is made a selection signal, a second multiplexer for selecting one of the second carry input or the second data input, a third multiplexer for selecting one of the first or the second carry inputs while the carry selection input is made a selection signal, and a second XOR element for generating an XOR output of an output of the third multiplexer and the XOR output, and is characterized in that an output of the first multiplexer is made a first carry output, an output of the second multiplexer is made a second carry output, and an output of the third multiplexer is made an addition value.Type: ApplicationFiled: August 27, 2003Publication date: April 7, 2005Inventor: Kimito Horie
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Publication number: 20040173084Abstract: A music playback unit for correcting the frequency characteristics of a speaker installed in a portable telephone, without using an equalizer. The musical score data is stored in the SMF memory, and data for correcting the velocity of musical score data for each velocity of each note is stored in a DB memory. The sound generator driver reads the musical score data from the SMF memory, and reads the correction data from the DB memory, and also corrects the velocity of the musical score data by substituting the musical score data and correction data in a predetermined calculation formula. The musical score data after the velocity is corrected is played by the MIDI sound generator, amplifier and speaker.Type: ApplicationFiled: July 16, 2003Publication date: September 9, 2004Inventors: Masao Tomizawa, Kaoru Tsukamoto, Tomohiro Iwanaga, Kimito Horie
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Publication number: 20040164883Abstract: A data compressing apparatus outputs character data and a pointer as intermediate data from input data. When a character string as a target of a command coincides with a character string as a target of the character data and a character string instructed by the pointer or a combination of them, substituting means outputs a command in place of the character data or the pointer and outputs output data including the character data, the pointer, and the command. The data compressing apparatus which can make free compression such that information or the like other than the character string is embedded is realized.Type: ApplicationFiled: February 24, 2004Publication date: August 26, 2004Inventor: Kimito Horie
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Publication number: 20030182340Abstract: The present invention provides a residue computing device on a Galois Field GF(2{circumflex over ( )}m), for calculating a residue R of a product of a multiplier factor X and a multiplicand Y under a modulo Z, which comprises a gate G1 for allowing the multiplier factor X to pass therethrough when a leading bit MSB of the multiplicand Y is 1, an adder ADD for adding a temporary residue R′ and a value obtained by the passage, a gate G2 for allowing the modulo Z to pass therethrough when a leading bit MSB of a summed value SUM of the adder is 1, and a subtractor SUB for subtracting the modulo Z from the summed value SUM of the adder when the leading bit MSB of the summed value SUM is 1, wherein a process for setting a value obtained by shifting a subtracted value of the subtractor by one bit, as the temporary residue R′ on the basis of the next clock is repeatedly performed for each clock to thereby calculate the residue R.Type: ApplicationFiled: September 6, 2002Publication date: September 25, 2003Inventor: Kimito Horie
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Publication number: 20030095556Abstract: The present invention has an object to perform transition signal control for creating asynchronous timing using the transition signal control circuit, which is comprised of Muller C elements with inverter. The control device is constituted by a machine ring comprising n-stages of transition signal control circuits, a state ring which is further comprised of k-stages of transition signal control circuits, and a synchronous circuit for synchronizing with the machine ring by receiving the vector Q(T1) which is output from the state ring. When the output vector Q(T1) of the state ring is received, the synchronous circuit outputs the vector S to the machine ring. The output vector Q(M) of the machine ring and the output vector Q(T) of the state ring create timings for controlling the processor, for example, asynchronously, and these timings are input to the instruction decoder, for example.Type: ApplicationFiled: July 16, 2002Publication date: May 22, 2003Inventors: Kimito Horie, Koichi Takeda
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Publication number: 20030079072Abstract: A competition arbitration system in which chances for using a resource of a computer such as a bus or the like among devices are fair is provided. Pulses are sequentially generated periodically from a pulse generating circuit. It is assumed that first device outputted first bus request signal and second device continuously outputted second bus request signal before rising timing of the first pulse. When a bus arbiter outputs a bus grant signal to the first device at the rising timing of the first pulse, the bus master of the first device outputs a bus use acknowledgment signal. Then a use grant inhibiting circuit receives the acknowledgment signal and outputs an inhibition signal for inhibiting use of other devices. Thus, the first device holds the use right of a bus and bus use requests of other devices are reserved.Type: ApplicationFiled: April 15, 2002Publication date: April 24, 2003Inventors: Koichi Takeda, Kimito Horie
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Publication number: 20030079153Abstract: The present invention implements an asynchronous transition signaling circuit which can be applied to a bus arbitrator or the like. The OR gate holds a token (feedback signal S) as long as the device enabling signal Grant is output, even after the request event ReqIn is canceled, and as a result, the Muller C element with an inverter cancels the output of the response event AckOut. When the device request signal Req is not output, the feedback signal S passes through the AND gate, and the request event ReqOut is output from the AND gate. At the same time, the device enabling signal Grant is no longer output, and the loop comprised of the Muller C element with an inverter, the OR gate and the AND gate is canceled. As a result, the token (feedback signal S) is transferred to the next transition signaling circuit.Type: ApplicationFiled: March 12, 2002Publication date: April 24, 2003Inventors: Koichi Takeda, Kimito Horie