Abstract: A system includes an encoder that manipulates postcoded data and produces parity bits, and a parity bit encoder that produces encoded parity bits by inserting into the parity bits one or more flags with polarities, or states, that are selected to produce, after precoding, precoded parity bits that meet predetermined modulation constraints.

Abstract: A system includes an encoder that manipulates postcoded data and produces parity bits, and a parity bit encoder that produces encoded parity bits by inserting into the parity bits one or more flags with polarities, or states, that are selected to produce, after precoding, precoded parity bits that meet predetermined modulation constraints.

Abstract: A method and apparatus are provided for storing data. The method and apparatus generate a plurality of ECC codewords, which define a cooperative block. Each ECC codeword includes a plurality of information symbols and first and second sets of corresponding redundancy symbols. Shared redundancy symbols are generated for the cooperative block based on a combination of the second sets of redundancy symbols from the plurality of ECC codewords. A respective set of parity codewords is generated for the cooperative block based on the shared redundancy symbols. The second set of redundancy symbols for each ECC codeword in the cooperative block is derivable from the parity codewords. The cooperative block and the respective parity codewords are stored, without the second set of redundancy symbols, on a storage medium.

Abstract: A method and apparatus are provided for decoding a sequence of code words into a sequence of data words. Each code word includes an encoded data word and an indicator bit. The encoded data word is extracted unchanged into a respective unencoded data word if an indicator bit has a first binary value and is extracted into the unencoded data word and then complemented if the indicator bit has a second, opposite binary value.

Abstract: A method and apparatus are provided for encoding and decoding digital information. A sequence of data words is received, wherein each data word has a running digital sum (RDS). The sequence of data words is encoded into a sequence of corresponding code words, which has a current RDS. For each data word a binary symbol is added to the data word and the data word is selectively complemented as a function of the RDS of the data word and the current RDS of the sequence of code words to form the corresponding code word.

Abstract: A method and apparatus are provided for encoding successive data words into respective code words. Each data word is mapped into data segments that are constrained to a first number of bit patterns, which is less than a second number of bit patterns that satisfy a first constraint. The data segments are encoded into intermediate code word segments selected from a first set of the bit patterns that satisfy the first constraint, wherein at least some of the bit patterns in the first set violate a second constraint. The intermediate code word segments are encoded into respective code word segments by encoding the intermediate code word segments that violate the second constraint with code word segments selected from a second, different set of the bit patterns that satisfy the first constraint and the second constraint.

Abstract: An encoding system for encoding digital data for transmission through a communication channel is described, which includes a DCF encoder and a parity encoder operatively coupled to the DCF encoder. The DCF encoder is adapted to receive a first data sequence, and to generate a first DCF code word and a new running digital sum as functions of the first data sequence and a pre-existing running digital sum, wherein the new running digital sum is limited to a maximum absolute value. The parity encoder is operatively coupled to the DCF encoder, and adapted to receive the first DCF code word from the DCF encoder, and to generate a first interleaved parity code word as a function of the first DCF code word, and to provide the first interleaved parity code word to a channel.

Abstract: A method and apparatus are provided for encoding digital information. A sequence of successive data words are encoded into a sequence of successive code words according to a code, such that a running digital sum (RDS) of the sequence of successive code words is bounded and is constrained to predetermined, non-adjacent values at boundaries between the code words.

Abstract: Methods of encoding and decoding as well as an encoder and decoder are provided for encoding data words into codewords and decoding codewords into data words. The data words are encoded by mapping each data word into a number of data segments. Each data segment is then encoded to form a codeword segment that has the same number of bits as the data word segment. The codeword segments are concatenated to form the codeword. The codewords are decoded by decoding individual codeword segments into data word segments that are the same size as the codeword segments. The data word segments are then mapped into the data word, which has fewer bits than the total number of bits across all data word segments.

Abstract: The present invention provides sequence detection which takes into account amplitude and/or time distortions caused by neighboring magnetization regions on the magnetic medium, wherein the distortions in one magnetization region are caused by the closeness of neighboring magnetization transitions on one or both sides thereof. The sequence detection according to the present invention provides an extended state diagram to include the effects of leading and/or trailing magnetization transitions. More particularly, it has been found that accounting for the effects of trailing transitions requires an increase in the number of states in the state diagram used to form the Viterbi detector. Leading transitions are neutralized by increasing the number of branches between states in the Viterbi detector. Increasing the number of branches instead of states keeps the complexity low and thus saves hardware and associated costs.

Abstract: Methods of encoding and decoding as well as an encoder and decoder are provided for encoding data words into codewords and decoding codewords into data words. The data words are encoded by mapping each data word into a number of data segments. Each data segment is then encoded to form a codeword segment that has the same number of bits as the data word segment. The codeword segments are concatenated to form the codeword. The codewords are decoded by decoding individual codeword segments into data word segments that are the same size as the codeword segments. The data word segments are then mapped into the data word, which has fewer bits than the total number of bits across all data word segments.

Abstract: Encoding and decoding systems and methods for digital data in 24 bit sequences. An encoder generates state variables as a function of four or fewer bits of the 24 bit sequence, and encodes the sequence into 11 and 14 bit codewords. After transmission, the 11 bit and 14 bit codewords are decoded using recovered state variables. The encoding places a run length limit (RLL) of k=7 on a 25 bit codeword comprised of the 11 and 14 bit codewords to limit runs of zeros. Each of the 11 bit and 14 bit codewords are preferably also encoded with a run length limit of interleaved bits is i=7. The encoding and decoding systems and methods can be applied to a magnetic disc drive.

Abstract: A storage device includes a storage medium, write element and a data input. A first encoder provides an encoded data output as a function of a first portion of the data input. The first encoder also provides a state output. A second encoder provides a second encoded data output as a function of the plurality of data input and as a function of the state output. The first and second data outputs are coupled to the write element for writing information onto the storage medium. In addition, a similar technique is used for a block decoder.

Abstract: A method and apparatus for encoding data produces a code stream of code words, where each code word includes two subsets of code bits. Each subset of code bits is constrained by a different maximum transition run constraint. In an alternative embodiment, the method and apparatus produces a code stream comprised of alternating even bit locations and odd bit locations, where the even bit locations are constrained by a different maximum run length constraint than the odd bit locations.

Abstract: An encoder and a method of encoding successive data words into successive code words having alternating code word lengths. Each code word has a plurality of bit locations. A first maximum transition run constraint is imposed on a first set of the bit locations, wherein each bit location in the first set is spaced S bit locations apart from one another, and S is an integer greater than one. A second maximum transition run constraint, which is different than the first maximum transition run constrain, is imposed on a second set of the bit locations, wherein the second set comprises each of the bit locations that are not in the first set. The alternating code word lengths and the value of S are defined such that corresponding bit locations in successive code words have the same maximum transition run constraint.

Abstract: Encoding and decoding systems for data blocks based on forming corresponding code blocks having a maximum number of successive repetitions of a first symbol and a maximum number of successive repetitions of a second symbol, and having code blocks which can represent plural different ones of said data blocks unambiguously by having further code blocks aid in distinguishing data block is being represented.

Abstract: A method apparatus for encoding segments having a selected number of ordered bits of binary data from a sequence of ordered bits of binary data into corresponding codewords having a selected number of ordered bits of binary data, such that the sequence of ordered bits of binary data is encoded into a sequence of codewords. The apparatus comprises a receiver device for receiving the segments; a separating device for separating the selected number of ordered bits of binary data of each segment into a corresponding first group and a corresponding second group; an encoder mapping device for mapping each first group into a corresponding word having a selected number of ordered bits of binary data; and an interleaving device for interleaving the bits of each corresponding second group with the selected number of ordered bits of binary data of each corresponding word to obtain the corresponding codewords.

Abstract: A method and apparatus for fault-tolerant identification of a particular header field of a recording device. Each one of a plurality of headers is a different value encoded into a codeword according to predetermined generator polynominal. A target codeword having a number of symbols is generated. The generated target codeword is identical to a target header codeword. The target header codeword is read to generate a readback codeword having a number of symbols. The target codeword and the readback codeword are compared and the difference between the number of symbols is counted. A not-target-header signal is generated when the difference exceeds a predetermined number corresponding to an error correction capacity of the generator polynominal.

Abstract: On-the-fly error correction is provided using syndromes of a codeword encoded on data storage media. First and second syndromes are generated and a variable prescaler prescales the second syndrome by a field element to produce a prescaled second syndrome where the field element is variable. The error value is determined based on the first syndrome, and the error location is determined based on a comparison between the error value and the value of the prescaled second syndrome. The error value located at the error location is then corrected.

Abstract: On-the-fly error correction is provided by using the remainder from division of the encoded codeword by its generator polynomial to look up error values and locations in a memory. Alternatively, the syndromes are so employed. The values in the memory are predetermined and preassociated with each remainder or syndrome set. Alternatively, syndrome S.sub.0 directly yields the error value.