Patents by Inventor Kiran Baby

Kiran Baby has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11909565
    Abstract: Decision feedback equalization (DFE) is used to help reduce inter-symbol interference (ISI) from a data signal received via a band-limited (or otherwise non-ideal) channel. In embodiment, a single-ended receiver trains DFE coefficients and the slicer reference voltage to improve the received eye height. The process for training avoids many whole range sweeps thereby shortening training time. A custom data pattern that includes low-frequency (DC with respect to DFE) and high-frequency (AC with respect to DFE) worst cases is used for training in a closed loop manner. Negative DFE is used to measure the AC height of the data. Positive DFE is used to find the DC height of the data pattern.
    Type: Grant
    Filed: August 2, 2022
    Date of Patent: February 20, 2024
    Assignee: Cadence Design Systems, Inc.
    Inventors: Anirudha Shelke, Ashwin S. Madhavakaimal, Kiran Baby
  • Patent number: 11810633
    Abstract: In a receiver having at least a first equalizer and a sampler, a calibration module jointly calibrates a reference voltage and one or more equalizer coefficients. For each of a set of test reference voltages, an equalizer coefficient for the first equalizer may be learned that maximizes a right eye boundary of an eye diagram of a sampler input signal to a sampler of the receiver following the equalization stage. Then, from the possible pairs of reference voltages and corresponding optimal equalizer coefficients, a pair is identified that maximizes an eye width of the eye diagram. After setting the reference voltage, the first equalizer coefficient may then be adjusted together with learning a second equalizer coefficient for the second equalizer using a similar technique.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: November 7, 2023
    Assignee: Cadence Design Systems, Inc.
    Inventors: Ashwin S. M., Anirudha Shelke, Navin Kumar Mishra, Phalguni Bala, Younus Syed, Kiran Baby, Sudhir Kumar Katla Shetty
  • Publication number: 20230048896
    Abstract: Decision feedback equalization (DFE) is used to help reduce inter-symbol interference (ISI) from a data signal received via a band-limited (or otherwise non-ideal) channel. In embodiment, a single-ended receiver trains DFE coefficients and the slicer reference voltage to improve the received eye height. The process for training avoids many whole range sweeps thereby shortening training time. A custom data pattern that includes low-frequency (DC with respect to DFE) and high-frequency (AC with respect to DFE) worst cases is used for training in a closed loop manner. Negative DFE is used to measure the AC height of the data. Positive DFE is used to find the DC height of the data pattern.
    Type: Application
    Filed: August 2, 2022
    Publication date: February 16, 2023
    Inventors: Anirudha SHELKE, Ashwin S. MADHAVAKAIMAL, Kiran BABY
  • Publication number: 20220051742
    Abstract: In a receiver having at least a first equalizer and a sampler, a calibration module jointly calibrates a reference voltage and one or more equalizer coefficients. For each of a set of test reference voltages, an equalizer coefficient for the first equalizer may be learned that maximizes a right eye boundary of an eye diagram of a sampler input signal to a sampler of the receiver following the equalization stage. Then, from the possible pairs of reference voltages and corresponding optimal equalizer coefficients, a pair is identified that maximizes an eye width of the eye diagram. After setting the reference voltage, the first equalizer coefficient may then be adjusted together with learning a second equalizer coefficient for the second equalizer using a similar technique.
    Type: Application
    Filed: August 30, 2021
    Publication date: February 17, 2022
    Inventors: Ashwin S. M., Anirudha Shelke, Navin Kumar Mishra, Phalguni Bala, Younus Syed, Kiran Baby, Sudhir Kumar Katla Shetty
  • Patent number: 11133081
    Abstract: In a receiver having at least a first equalizer and a sampler, a calibration module jointly calibrates a reference voltage and one or more equalizer coefficients. For each of a set of test reference voltages, an equalizer coefficient for the first equalizer may be learned that maximizes a right eye boundary of an eye diagram of a sampler input signal to a sampler of the receiver following the equalization stage. Then, from the possible pairs of reference voltages and corresponding optimal equalizer coefficients, a pair is identified that maximizes an eye width of the eye diagram. After setting the reference voltage, the first equalizer coefficient may then be adjusted together with learning a second equalizer coefficient for the second equalizer using a similar technique.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: September 28, 2021
    Assignee: Rambus Inc.
    Inventors: Ashwin S. M., Anirudha Shelke, Navin Kumar Mishra, Phalguni Bala, Younus Syed, Kiran Baby, Sudhir Kumar Katla Shetty
  • Publication number: 20210090675
    Abstract: In a receiver having at least a first equalizer and a sampler, a calibration module jointly calibrates a reference voltage and one or more equalizer coefficients. For each of a set of test reference voltages, an equalizer coefficient for the first equalizer may be learned that maximizes a right eye boundary of an eye diagram of a sampler input signal to a sampler of the receiver following the equalization stage. Then, from the possible pairs of reference voltages and corresponding optimal equalizer coefficients, a pair is identified that maximizes an eye width of the eye diagram. After setting the reference voltage, the first equalizer coefficient may then be245 adjusted together with learning a second equalizer coefficient for the second equalizer using a similar technique.
    Type: Application
    Filed: September 18, 2020
    Publication date: March 25, 2021
    Inventors: Ashwin S. M., Anirudha Shelke, Navin Kumar Mishra, Phalguni Bala, Younus Syed, Kiran Baby, Sudhir Kumar Katla Shetty