Patents by Inventor Kiran Tati
Kiran Tati has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180322023Abstract: Techniques for implementing high availability for persistent memory are provided. In one embodiment, a first computer system can detect an alternating current (AC) power loss/cycle event and, in response to the event, can save data in a persistent memory of the first computer system to a memory or storage device that is remote from the first computer system and is accessible by a second computer system. The first computer system can then generate a signal for the second computer system subsequently to initiating or completing the save process, thereby allowing the second computer system to restore the saved data from the memory or storage device into its own persistent memory.Type: ApplicationFiled: May 3, 2017Publication date: November 8, 2018Inventors: Pratap Subrahmanyam, Rajesh Venkatasubramanian, Kiran Tati, Qasim Ali
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Publication number: 20180321962Abstract: Techniques for implementing OS/hypervisor-based persistent memory are provided. In one embodiment, an OS or hypervisor running on a computer system can allocate a portion of the volatile memory of the computer system as a persistent memory allocation. The OS/hypervisor can further receive a signal from the computer system's BIOS indicating an AC power loss or cycle event and, in response to the signal, can save data in the persistent memory allocation to a nonvolatile backing store. Then, upon restoration of AC power to the computer system, the OS/hypervisor can restore the saved data from the nonvolatile backing store to the persistent memory allocation.Type: ApplicationFiled: May 3, 2017Publication date: November 8, 2018Inventors: Venkata Subhash Reddy Peddamallu, Kiran Tati, Rajesh Venkatasubramanian, Pratap Subrahmanyam
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Patent number: 10083123Abstract: Examples provide a page-fault latency feedback metric to determine performance of workloads or virtual machines (VMs) running on a VM host in a cluster. A hypervisor induces page-faults by varying a memory limit associated with a VM. Page-fault latencies are measured at each of the varying memory limits. A performance loss occurring at each page-fault latency is measured and converted to a performance score. A page-fault translation table is constructed based on the page-fault latencies and assigned performance scores. When a page-fault occurs during execution of a workload on a VM host in the cluster, a cluster manager maps the page-fault latency associated with the page-fault to a performance score in the page-fault translation table. The cluster manager computes a current workload performance or VM performance based on the page-fault latency and the performance score.Type: GrantFiled: August 10, 2016Date of Patent: September 25, 2018Assignee: VMware, Inc.Inventors: Ishan Banerjee, Jui-Hao Chiang, Kiran Tati, Preeti Agarwal
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Patent number: 9977747Abstract: Memory performance in a computer system that implements large page mapping is improved even when memory is scarce by identifying page sharing opportunities within the large pages at the granularity of small pages and breaking up the large pages so that small pages within the large page can be freed up through page sharing. In addition, the number of small page sharing opportunities within the large pages can be used to estimate the total amount of memory that could be reclaimed through page sharing.Type: GrantFiled: February 24, 2016Date of Patent: May 22, 2018Assignee: VMware, Inc.Inventors: Yury Baskakov, Alexander Thomas Garthwaite, Rajesh Venkatasubramanian, Irene Zhang, Seongbeom Kim, Nikhil Bhatia, Kiran Tati
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Publication number: 20180046581Abstract: Examples provide a page-fault latency feedback metric to determine performance of workloads or virtual machines (VMs) running on a VM host in a cluster. A hypervisor induces page-faults by varying a memory limit associated with a VM. Page-fault latencies are measured at each of the varying memory limits. A performance loss occurring at each page-fault latency is measured and converted to a performance score. A page-fault translation table is constructed based on the page-fault latencies and assigned performance scores. When a page-fault occurs during execution of a workload on a VM host in the cluster, a cluster manager maps the page-fault latency associated with the page-fault to a performance score in the page-fault translation table. The cluster manager computes a current workload performance or VM performance based on the page-fault latency and the performance score.Type: ApplicationFiled: August 10, 2016Publication date: February 15, 2018Inventors: Ishan Banerjee, Jui-Hao Chiang, Kiran Tati, Preeti Agarwal
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Patent number: 9880740Abstract: A computer system provides for rapid power-on operations on virtual machines (VMs) with a virtual memory space including a reservation from machine memory and a small or no swap size. When the computer system powers on a VM, the computer system creates a physical memory space for the VM with a size larger than the minimum memory reservation for the VM and a swap space with a size less than the difference between the size of the virtual memory space and the minimum memory reservation. Subsequently, the computer system iteratively decreases the size of the physical memory space for the VM and increases the size of the swap space for the VM until the size of the physical memory space equals the minimum size of the memory reservation, which may be the amount of the virtual space that is guaranteed to be backed by machine memory.Type: GrantFiled: December 17, 2015Date of Patent: January 30, 2018Assignee: VMware, Inc.Inventors: Kiran Tati, Ishan Banerjee, Jui-Hao Chiang
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Publication number: 20170177238Abstract: A computer system provides for rapid power-on operations on virtual machines (VMs) with a virtual memory space including a reservation from machine memory and a small or no swap size. When the computer system powers on a VM, the computer system creates a physical memory space for the VM with a size larger than the minimum memory reservation for the VM and a swap space with a size less than the difference between the size of the virtual memory space and the minimum memory reservation. Subsequently, the computer system iteratively decreases the size of the physical memory space for the VM and increases the size of the swap space for the VM until the size of the physical memory space equals the minimum size of the memory reservation, which may be the amount of the virtual space that is guaranteed to be backed by machine memory.Type: ApplicationFiled: December 17, 2015Publication date: June 22, 2017Inventors: Kiran TATI, Ishan BANERJEE, Jui-Hao CHIANG
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Patent number: 9547510Abstract: A system and method are disclosed for improving operation of a memory scheduler operating on a host machine supporting virtual machines (VMs) in which guest operating systems and guest applications run. For each virtual machine, the host machine hypervisor categorizes memory pages into memory usage classes and estimates the total number of pages for each memory usage class. The memory scheduler uses this information to perform memory reclamation and allocation operations for each virtual machine. The memory scheduler further selects between ballooning reclamation and swapping reclamation operations based in part on the numbers of pages in each memory usage class for the virtual machine. Calls to the guest operating system provide the memory usage class information. Memory reclamation not only can improve the performance of existing VMs, but can also permit the addition of a VM on the host machine without substantially impacting the performance of the existing and new VMs.Type: GrantFiled: December 10, 2013Date of Patent: January 17, 2017Assignee: VMware, Inc.Inventors: Xavier Deguillard, Ishan Banerjee, Qasim Ali, Yury Baskakov, Kiran Tati, Rajesh Venkatasubramanian
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Patent number: 9529609Abstract: A system and method are disclosed for improving operation of a memory scheduler operating on a host machine supporting virtual machines (VMs) in which guest operating systems and guest applications run. For each virtual machine, the host machine hypervisor categorizes memory pages into memory usage classes and estimates the total number of pages for each memory usage class. The memory scheduler uses this information to perform memory reclamation and allocation operations for each virtual machine. The memory scheduler further selects between ballooning reclamation and swapping reclamation operations based in part on the numbers of pages in each memory usage class for the virtual machine. Calls to the guest operating system provide the memory usage class information. Memory reclamation not only can improve the performance of existing VMs, but can also permit the addition of a VM on the host machine without substantially impacting the performance of the existing and new VMs.Type: GrantFiled: December 10, 2013Date of Patent: December 27, 2016Assignee: VMware, Inc.Inventors: Xavier DeGuillard, Ishan Banerjee, Qasim Ali, Yury Baskakov, Kiran Tati, Rajesh Venkatasubramanian
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Patent number: 9524233Abstract: A technique for efficient swap space management creates a swap reservation file using thick provisioning to accommodate a maximum amount of memory reclamation from a set of one or more associated virtual machines (VMs). A VM swap file is created for each VM using thin provisioning. When a new block is needed to accommodate page swaps to a given VM swap file, a block is removed from the swap reservation file and a block is added to the VM swap file, thereby maintaining a net zero difference in overall swap storage. The removed block and the added block may be the same storage block if a block move operation is supported by a file system implementing the swap reservation file and VM swap files. The technique also accommodates swap space management of resource pools.Type: GrantFiled: March 5, 2013Date of Patent: December 20, 2016Assignee: VMware, Inc.Inventors: Rajesh Venkatasubramanian, Ishan Banerjee, Kiran Tati, Philip Peter Moltmann
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Patent number: 9454489Abstract: When a request is made to retrieve a guest physical page from memory and a page fault occurs, a guest virtual page address that corresponds to the guest physical page is identified along with addresses for guest virtual pages that are near the guest virtual page in the virtual address space. Each identified guest virtual page address is translated into a corresponding guest physical page address and the corresponding guest physical pages are loaded into memory.Type: GrantFiled: July 17, 2015Date of Patent: September 27, 2016Assignee: VMware, Inc.Inventors: Kiran Tati, Gabriel Tarasuk-Levin, Ka Wing Ho, Jesse Pool
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Publication number: 20160170906Abstract: Memory performance in a computer system that implements large page mapping is improved even when memory is scarce by identifying page sharing opportunities within the large pages at the granularity of small pages and breaking up the large pages so that small pages within the large page can be freed up through page sharing. In addition, the number of small page sharing opportunities within the large pages can be used to estimate the total amount of memory that could be reclaimed through page sharing.Type: ApplicationFiled: February 24, 2016Publication date: June 16, 2016Inventors: Yury BASKAKOV, Alexander Thomas GARTHWAITE, Rajesh VENKATASUBRAMANIAN, Irene ZHANG, Seongbeom KIM, Nikhil BHATIA, Kiran TATI
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Patent number: 9292452Abstract: Memory performance in a computer system that implements large page mapping is improved even when memory is scarce by identifying page sharing opportunities within the large pages at the granularity of small pages and breaking up the large pages so that small pages within the large page can be freed up through page sharing. In addition, the number of small page sharing opportunities within the large pages can be used to estimate the total amount of memory that could be reclaimed through page sharing.Type: GrantFiled: July 3, 2013Date of Patent: March 22, 2016Assignee: VMware, Inc.Inventors: Yury Baskakov, Alexander Thomas Garthwaite, Rajesh Venkatasubramanian, Irene Zhang, Seongbeom Kim, Nikhil Bhatia, Kiran Tati
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Publication number: 20150324297Abstract: When a request is made to retrieve a guest physical page from memory and a page fault occurs, a guest virtual page address that corresponds to the guest physical page is identified along with addresses for guest virtual pages that are near the guest virtual page in the virtual address space. Each identified guest virtual page address is translated into a corresponding guest physical page address and the corresponding guest physical pages are loaded into memory.Type: ApplicationFiled: July 17, 2015Publication date: November 12, 2015Inventors: Kiran TATI, Gabriel TARASUK-LEVIN, Ka Wing HO, Jesse POOL
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Patent number: 9116829Abstract: The prioritization of large memory page mapping is a function of the access bits in the L1 page table. In a first phase of operation, the number of set access bits in each of the L1 page tables is counted periodically and a current count value is calculated therefrom. During the first phase, no pages are mapped large even if identified as such. After the first phase, the current count value is used to prioritize among potential large memory pages to determine which pages to map large. The system continues to calculate the current count value even after the first phase ends. When using hardware assist, the access bits in the nested page tables are used and when using software MMU, the access bits in the shadow page tables are used for large page prioritization.Type: GrantFiled: July 1, 2014Date of Patent: August 25, 2015Assignee: VMware, Inc.Inventors: Qasim Ali, Vivek Pandey, Raviprasad Mummidi, Kiran Tati
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Patent number: 9086981Abstract: When a request is made to retrieve a guest physical page from memory and a page fault occurs, a guest virtual page address that corresponds to the guest physical page is identified along with addresses for guest virtual pages that are near the guest virtual page in the virtual address space. Each identified guest virtual page address is translated into a corresponding guest physical page address and the corresponding guest physical pages are loaded into memory.Type: GrantFiled: November 2, 2010Date of Patent: July 21, 2015Assignee: VMware, Inc.Inventors: Kiran Tati, Gabriel Tarasuk-Levin, KaWing Ho, Jesse Pool
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Patent number: 9063866Abstract: Activity level of memory pages is classified in virtual machine environment, so that processes such as live VM migration and checkpointing, among others, can be carried out more efficiently. The method includes the steps of scanning page table entries of hypervisor-managed page tables continuously over repeating scan periods to determine whether memory pages have been accessed or not, and for each memory page, determining an activity level of the memory page based on whether the memory page has been accessed or not since a prior scan and storing the activity level of the memory page. The activity level of the memory page may be represented by one or more bits of its page table entry and may be classified as having at least two states ranging from hot to cold.Type: GrantFiled: July 12, 2010Date of Patent: June 23, 2015Assignee: VMware, Inc.Inventors: Kiran Tati, Irfan Ahmad
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Publication number: 20150161055Abstract: A system and method are disclosed for improving operation of a memory scheduler operating on a host machine supporting virtual machines (VMs) in which guest operating systems and guest applications run. For each virtual machine, the host machine hypervisor categorizes memory pages into memory usage classes and estimates the total number of pages for each memory usage class. The memory scheduler uses this information to perform memory reclamation and allocation operations for each virtual machine. The memory scheduler further selects between ballooning reclamation and swapping reclamation operations based in part on the numbers of pages in each memory usage class for the virtual machine. Calls to the guest operating system provide the memory usage class information. Memory reclamation not only can improve the performance of existing VMs, but can also permit the addition of a VM on the host machine without substantially impacting the performance of the existing and new VMs.Type: ApplicationFiled: December 10, 2013Publication date: June 11, 2015Applicant: VMare, Inc.Inventors: Xavier DEGUILLARD, Ishan Banerjee, Qasim Ali, Yury Baskakov, Kiran Tati, Rajesh Venkatasubramanian
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Publication number: 20150161056Abstract: A system and method are disclosed for improving operation of a memory scheduler operating on a host machine supporting virtual machines (VMs) in which guest operating systems and guest applications run. For each virtual machine, the host machine hypervisor categorizes memory pages into memory usage classes and estimates the total number of pages for each memory usage class. The memory scheduler uses this information to perform memory reclamation and allocation operations for each virtual machine. The memory scheduler further selects between ballooning reclamation and swapping reclamation operations based in part on the numbers of pages in each memory usage class for the virtual machine. Calls to the guest operating system provide the memory usage class information. Memory reclamation not only can improve the performance of existing VMs, but can also permit the addition of a VM on the host machine without substantially impacting the performance of the existing and new VMs.Type: ApplicationFiled: December 10, 2013Publication date: June 11, 2015Applicant: VMware, Inc.Inventors: Xavier DEGUILLARD, Ishan Banerjee, Qasim Ali, Yury Baskakov, Kiran Tati, Rajesh Venkatasubramanian
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Patent number: 9032398Abstract: Activity level of memory pages is classified in virtual machine environment, so that processes such as live VM migration and checkpointing, among others, can be carried out more efficiently. The method includes the steps of scanning page table entries of hypervisor-managed page tables continuously over repeating scan periods to determine whether memory pages have been accessed or not, and for each memory page, determining an activity level of the memory page based on whether the memory page has been accessed or not since a prior scan and storing the activity level of the memory page. The activity level of the memory page may be represented by one or more bits of its page table entry and may be classified as having at least two states ranging from hot to cold.Type: GrantFiled: July 12, 2010Date of Patent: May 12, 2015Assignee: VMware, Inc.Inventors: Irfan Ahmad, Carl A. Waldspurger, Alexander Thomas Garthwaite, Kiran Tati, Pin Lu