Patents by Inventor Kirby Lam

Kirby Lam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6064947
    Abstract: A successive approximation system and method for calibrating an oscillator in a time base generator application. An oscillator output frequency is compared to a reference frequency. Control logic calibrates an input control current to the oscillator, one bit at a time, through a digital-to-analog converter. The calibrated input control current corrects central frequency errors in the oscillator. Successive approximation continues until all bits are tested.
    Type: Grant
    Filed: August 27, 1997
    Date of Patent: May 16, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Bo Sun, Kirby Lam, Rodney Masumoto
  • Patent number: 5642244
    Abstract: A servo gate method and apparatus to allow switching between a servo mode and a data mode in the read channel of a disk drive. The present invention uses a servo gate signal to select components and parameters in the read channel of a disk drive. The servo gate signal, when enabled, preloads appropriate registers with new values and preloads the programmable filter with new values. The servo gate signal is not limited to preloading the above values, but may be used to control many characteristics of a disk drive read channel.
    Type: Grant
    Filed: July 7, 1994
    Date of Patent: June 24, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Paul Okada, Tim Jackson, Kirby Lam, Richard Contreras
  • Patent number: 5351015
    Abstract: The present invention provides a method and an apparatus for controlling initial transients in a frequency synthesizer by controlling the start-up sequence of the device. The start-up sequence comprises several steps. The voltage controlled oscillator(s) (VCO) is reset so that the VCO(s) are in a known state during start-up. The charge pump and phase detector of phase-locked loop (PLL) are disabled. New data values are loaded into counter(s)/register(s) that control the frequency of the VCO(s). Also, a data value is provided to a digital-to-analog converter (DAC) to set the data rate for the PLL. A fixed amount of time is provided as a delay for the DAC to settle (i.e., 1.6 .mu.s). Divide-by-M and divide-by-N counters are then enabled. Also, the phase detector of the phase-locked loop (PLL) is enabled. The VCO is then restarted.
    Type: Grant
    Filed: February 3, 1993
    Date of Patent: September 27, 1994
    Assignee: Silicon Systems, Inc.
    Inventors: Rodney T. Masumoto, Shunsaku Ueda, Jenn-Gang Chern, Kirby Lam