Patents by Inventor Kit M. Chow

Kit M. Chow has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8274521
    Abstract: A method involving receiving an indication of a requirement to allocate at least one page for a process, where pages are associated with cache colors; generating a selection bitmap by performing a logical operation of a system available colors bitmap and a process bitmap, where the system available colors bitmap and the process bitmap each include one bit corresponding to each cache color, where each bit of the system available colors bitmap indicates whether a number of pages associated with a corresponding cache color that are available to be allocated is above a minimum threshold, and where each bit of the process bitmap indicates whether any pages associated with the corresponding cache color have been recently allocated for the process. The method also includes selecting, using the selection bitmap, a cache color; and allocating a page for the process, wherein the allocated page is associated with the selected cache color.
    Type: Grant
    Filed: May 8, 2009
    Date of Patent: September 25, 2012
    Assignee: Oracle America, Inc.
    Inventors: George R. Cameron, Blake A. Jones, Kit M. Chow
  • Publication number: 20100283793
    Abstract: A method involving receiving an indication of a requirement to allocate at least one page for a process, where pages are associated with cache colors; generating a selection bitmap by performing a logical operation of a system available colors bitmap and a process bitmap, where the system available colors bitmap and the process bitmap each include one bit corresponding to each cache color, where each bit of the system available colors bitmap indicates whether a number of pages associated with a corresponding cache color that are available to be allocated is above a minimum threshold, and where each bit of the process bitmap indicates whether any pages associated with the corresponding cache color have been recently allocated for the process. The method also includes selecting, using the selection bitmap, a cache color; and allocating a page for the process, wherein the allocated page is associated with the selected cache color.
    Type: Application
    Filed: May 8, 2009
    Publication date: November 11, 2010
    Applicant: Sun Microsystems, Inc.
    Inventors: George R. Cameron, Blake A. Jones, Kit M. Chow
  • Patent number: 6711632
    Abstract: A method and apparatus for write-back caching in a data storage and processing system has been described. The method comprises the steps of receiving a write request including write data from a compute node in a first I/O node, forwarding the write data from the first I/O node to a second I/O node, and sending an acknowledgment message to the compute node from the second I/O node after the write data is received by the second I/O node. After the data is written into non-volatile storage of the first I/O node, a purge request or command is sent to the second I/O node to purge the write data from the volatile memory of the second I/O node. In one embodiment, the purge request is not sent until the first I/O node receives a second write request, in which case, the purge request is sent in the same interrupt as the write data for the second write request.
    Type: Grant
    Filed: August 11, 1998
    Date of Patent: March 23, 2004
    Assignee: NCR Corporation
    Inventors: Kit M. Chow, P. Keith Muller, Michael W. Meyer, Gary L. Boggs
  • Patent number: 6594698
    Abstract: A method, apparatus, and article of manufacture for dynamically binding shared resources among I/O nodes is disclosed. The method comprises the steps of de-allocating resources requested by an initiating node from a responding node, allocating resources not requested by the initiating node and reachable by the responding node to the responding node, de-allocating resources allocated to the second node from the first node, and allocating unallocated resources reachable by the first node to the first node. The article of manufacture comprises a program storage device tangibly embodying program steps executable by a computer for performing the foregoing method steps. The apparatus comprises a data storage resource having a plurality of storage resources, a first I/O node and a second I/O node.
    Type: Grant
    Filed: September 25, 1998
    Date of Patent: July 15, 2003
    Assignee: NCR Corporation
    Inventors: Kit M. Chow, Niels Haahr Hornekær, Morten Skøien With
  • Patent number: 6256740
    Abstract: A method and apparatus for communicating data in a highly distributed parallel processing computer architecture is described. The method comprises the steps of generating a globally unique ID in the I/O node for a data extent physically stored in the plurality of storage devices, binding the globally unique ID to the data extent, and exporting the globally unique ID to the compute nodes via the interconnect fabric. In one embodiment, the globally unique ID is generated from a globally unique I/O node identifier and a locally unique data extent identifier. A local entry point is generated in the compute node for the data associated with the globally unique ID, thereby presenting the globally unique ID as a device point in the compute node.
    Type: Grant
    Filed: February 6, 1998
    Date of Patent: July 3, 2001
    Assignee: NCR Corporation
    Inventors: P. Keith Muller, Kit M. Chow, Michael W. Meyer
  • Patent number: 6247077
    Abstract: A highly-scalable parallel processing computer system architecture is described. The parallel processing system comprises a plurality of compute nodes for executing applications, a plurality of I/O nodes, each communicatively coupled to a plurality of storage resources, and an interconnect fabric providing communication between any of the compute nodes and any of the I/O nodes. The interconnect fabric comprises a network for connecting the compute nodes and the I/O nodes, the network comprising a plurality of switch nodes arranged into more than g(logbN) switch node stages, wherein b is a total number of switch node input/output ports, and g(x) indicates a ceiling function providing the smallest integer not less than the argument x, the switch node stages thereby providing a plurality of paths between any network input port and network output port.
    Type: Grant
    Filed: February 6, 1998
    Date of Patent: June 12, 2001
    Assignee: NCR Corporation
    Inventors: P. Keith Muller, Kit M. Chow, Michael W. Meyer, Alan P. Adamson
  • Patent number: 6148349
    Abstract: The present invention describes a parallel processing system. The system comprises a plurality of compute nodes for executing applications via a storage application interface having system input/output calls, a plurality of I/O nodes, and a file system implemented in the compute node, for storing information mapping API system input/output calls for the data object with the globally unique identification for the data object. Each I/O node manages a communicatively coupled plurality of storage resources and each has a means for generating a globally unique identification for a data object stored on the storage resource and transmits the globally unique identification and the data object to the compute node via at least one interconnecting fabric providing communication between any of the compute node and any of the I/O nodes.
    Type: Grant
    Filed: February 6, 1998
    Date of Patent: November 14, 2000
    Assignee: NCR Corporation
    Inventors: Kit M. Chow, Michael W. Meyer, P. Keith Muller, Alan P. Adamson
  • Patent number: 6105122
    Abstract: A method for transferring data from a first node to a second node in a multi-processor system is described. The multi-processor system comprises a plurality of nodes coupled to an interconnect fabric via an interconnect fabric interface, the nodes comprising a compute node and an I/O node, the I/O node coupled to a plurality of data storage devices. The method comprises the steps of generating a I/O request packet in a first node in response to an I/O request from an application executing in a first node, transmitting the data request packet to the second node via the interconnect fabric, and executing the destination interconnect channel program to extract the debit ID to transfer the data request to the second node buffer.
    Type: Grant
    Filed: February 6, 1998
    Date of Patent: August 15, 2000
    Assignee: NCR Corporation
    Inventors: P. Keith Muller, Kit M. Chow