Patents by Inventor Kiyokasu Hiwada

Kiyokasu Hiwada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5016226
    Abstract: In one embodiment of the invention, the selection of the number of the latches from which data is read can be changed dynamically during the generation of the data stream. The scanning of the latches can be stopped temporarily while the next set of data from the memory is stored in the latches, then resumed. For example, assume that n+1 number of banks are provided in the memory and that the selection of the number of the latches can be changed dynamically between n and n+1. Then, the possible length/period, N, of the data stream that can be generated would be:N=i*n+j*(n+1)where i and j are non-negative integers, and one of i or j is non-zero.In another embodiment of the present invention, the memory has m+n banks, and the latch group has m+n latches. The number of the latches from which data is read during each scanning cycle can be selected from the range n, n+1, . . . , n+m-1, n+m. Consequently, any data stream having a length or period which is a multiple of any of n, n+1, . . .
    Type: Grant
    Filed: November 9, 1988
    Date of Patent: May 14, 1991
    Assignee: Hewlett-Packard
    Inventors: Kiyokasu Hiwada, Nobuyuki Kasuga