Patents by Inventor Kiyonori Watanabe
Kiyonori Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7534664Abstract: The present invention provides a semiconductor device capable of improving productivity while maintaining electrical characteristics, and a manufacturing method thereof. One characteristic point of the present invention is that a plating processing condition (A) for forming a metal wiring layer (redistribution wiring) corresponding to a first conductive layer and a plating processing condition (B) for forming a post electrode corresponding to a second conductive layer are made different from each other.Type: GrantFiled: September 25, 2007Date of Patent: May 19, 2009Assignee: Oki Electric Industry Co., Ltd.Inventor: Kiyonori Watanabe
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Patent number: 7446414Abstract: A semiconductor device includes a semiconductor substrate, an electrode pad electrically connected to a circuit element formed on the semiconductor substrate, a connection wiring electrically connected to the electrode pad and extending on the semiconductor substrate, and a post electrode formed on the connection wiring. The semiconductor device further includes an adhesion film formed on the side surface of the post electrode, and a sealing layer that has light-shielding property and seals the surface of the adhesion film and the connection wiring.Type: GrantFiled: October 10, 2006Date of Patent: November 4, 2008Assignee: Oki Electric Industry Co., Ltd.Inventor: Kiyonori Watanabe
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Publication number: 20080217772Abstract: The present invention provides a method for forming a semiconductor device, which comprises the steps of preparing a semiconductor wafer including an electrode pad, an insulating film formed with a through hole and a bedding metal layer which are formed in a semiconductor substrate, forming a first resist mask which exposes each area for forming a redistribution wiring, over the bedding metal layer, forming a redistribution wiring connected to the electrode pad and extending in an electrode forming area for a post electrode with the first resist mask as a mask, removing the first resist mask by a dissolving solution to expose each area excluding the electrode forming area for the redistribution wiring and forming a second resist mask disposed with being separated from each side surface of the redistribution wiring, forming a redistribution wiring protective metal film over upper and side surfaces of the exposed redistribution wiring with the second resist mask as a mask, removing the second resist mask by a dType: ApplicationFiled: March 3, 2008Publication date: September 11, 2008Applicant: OKI ELECTRIC INDUSTRY CO., LTD.Inventor: Kiyonori Watanabe
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Publication number: 20080054479Abstract: A semiconductor device includes a semiconductor substrate having an internal circuit; an electrode pad electrically connected to the internal circuit; an insulating film having a through hole exposing the electrode pad; and a re-distribution wiring pattern formed on the insulating film and electrically connected to the electrode pad. The semiconductor device further includes a recess groove formed in the insulating film around and adjacent to the re-distribution wiring pattern.Type: ApplicationFiled: August 16, 2007Publication date: March 6, 2008Inventor: Kiyonori Watanabe
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Publication number: 20080032458Abstract: The present invention provides a semiconductor device capable of improving productivity while maintaining electrical characteristics, and a manufacturing method thereof. One characteristic point of the present invention is that a plating processing condition (A) for forming a metal wiring layer (redistribution wiring) corresponding to a first conductive layer and a plating processing condition (B) for forming a post electrode corresponding to a second conductive layer are made different from each other.Type: ApplicationFiled: September 25, 2007Publication date: February 7, 2008Inventor: Kiyonori Watanabe
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Publication number: 20080023836Abstract: A semiconductor device which is capable of preventing interface peeling and a crack from occurring in the vicinity of the edge part of a rewiring layer is provided. The semiconductor device comprises a semiconductor substrate; a first interlayer insulation film (a first insulation film) which is formed on the semiconductor substrate, having a first aperture; a first rewiring layer which is formed, ranging from a part of the top surface of the first interlayer insulation film to the inside of the first aperture, and which uppermost surface has a size smaller than the size of the region surrounded by the outer periphery of the surface contacting with the first interlayer insulation film; and a second interlayer insulation film (a second insulation film) which is formed on the first rewiring layer and on the first interlayer insulation film.Type: ApplicationFiled: May 18, 2007Publication date: January 31, 2008Applicant: OKI ELECTRIC INDUSTRY CO., LTD.Inventor: Kiyonori Watanabe
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Publication number: 20080012129Abstract: A semiconductor device includes a semiconductor chip having a first main surface having an electrode pad in an exposed state, and an interlayer insulation layer formed on the first main surface so that the electrode pad is partially exposed; a re-distribution wiring layer including a wiring pattern having a linear portion having one end portion electrically connected to the electrode pad and extending from the electrode pad, and a post electrode mounting portion with a recessed polygonal shape and connected to the other end portion of the linear portion; a post electrode formed on the post electrode mounting portion and having a bottom surface with a contour crossing an upper contour of the post electrode mounting portion at more than two points; a sealing portion disposed so that a top of the post electrode is exposed; and an outer terminal formed on the top of the post electrode.Type: ApplicationFiled: July 12, 2007Publication date: January 17, 2008Inventor: Kiyonori Watanabe
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Patent number: 7282800Abstract: The present invention provides a semiconductor device capable of improving productivity while maintaining electrical characteristics, and a manufacturing method thereof. One characteristic point of the present invention is that a plating processing condition (A) for forming a metal wiring layer (redistribution wiring) corresponding to a first conductive layer and a plating processing condition (B) for forming a post electrode corresponding to a second conductive layer are made different from each other.Type: GrantFiled: July 30, 2004Date of Patent: October 16, 2007Assignee: Oki Electric Industry Co., Ltd.Inventor: Kiyonori Watanabe
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Publication number: 20070108606Abstract: A semiconductor device includes a semiconductor substrate, an electrode pad electrically connected to a circuit element formed on the semiconductor substrate, a connection wiring electrically connected to the electrode pad and extending on the semiconductor substrate, and a post electrode formed on the connection wiring. The semiconductor device further includes an adhesion film formed on the side surface of the post electrode, and a sealing layer that has light-shielding property and seals the surface of the adhesion film and the connection wiring.Type: ApplicationFiled: October 10, 2006Publication date: May 17, 2007Applicant: OKI ELECTRIC INDUSTRY CO., LTD.Inventor: Kiyonori Watanabe
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Publication number: 20060278973Abstract: A semiconductor device comprises: a base; a semiconductor chip provided on the base which includes a first main surface 20a on which a plurality of electrode pads is provided, a surface protecting film provided on the first main surface, a second main surface which opposes the first main surface, and a plurality of side surfaces between the surface of the surface protecting film and the second main surface; an insulating extension portion formed so as to surround the side surfaces of the semiconductor chip; a plurality of wiring patterns electrically connected to the electrode pads, respectively and extended from the electrode pads to the surface of the extension portion; a sealing portion formed on the wiring patterns such that a part of each of the wiring patterns is exposed; and a plurality of external terminals provided on the wiring patterns in a region including the upper side of the extension portion.Type: ApplicationFiled: August 23, 2006Publication date: December 14, 2006Applicant: OKI ELECTRIC INDUSTRY CO., LTD.Inventor: Kiyonori Watanabe
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Patent number: 7109579Abstract: A semiconductor device comprises: a base; a semiconductor chip provided on the base which includes a first main surface 20a on which a plurality of electrode pads is provided, a surface protecting film provided on the first main surface, a second main surface which opposes the first main surface, and a plurality of side surfaces between the surface of the surface protecting film and the second main surface; an insulating extension portion formed so as to surround the side surfaces of the semiconductor chip; a plurality of wiring patterns electrically connected to the electrode pads, respectively and extended from the electrode pads to the surface of the extension portion; a sealing portion formed on the wiring patterns such that a part of each of the wiring patterns is exposed; and a plurality of external terminals provided on the wiring patterns in a region including the upper side of the extension portion.Type: GrantFiled: October 31, 2003Date of Patent: September 19, 2006Assignee: Oki Electric Industry Co., Ltd.Inventor: Kiyonori Watanabe
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Publication number: 20060163058Abstract: A plating apparatus includes a plating solution bath which is capable to contain a plating solution therein; a holding mechanism which is capable to hold a wafer so that a processing surface is soaked in the plating solution, contained in the plating solution bath; a first electrode provided in the plating solution bath; an inflow port from which the plating solution is supplied into the plating solution bath so that the plating solution flows through the first electrode toward the wafer; and a power supply which is capable to supply an electric current to be flowing through the plating solution located between the first electrode and wafer. The plating solution bath comprises a projected inner wall portion, arranged between the first electrode and the wafer, to control an electric field forwarding to the wafer. The projected inner wall portion is formed as a part an inner wall of the plating solution bath.Type: ApplicationFiled: January 26, 2005Publication date: July 27, 2006Inventor: Kiyonori Watanabe
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Publication number: 20060138671Abstract: A semiconductor device includes a semiconductor substrate with circuit elements and electrode pads formed on one surface. This surface is covered by a dielectric layer with openings above the electrode pads. A metal layer is deposited on the dielectric layer and patterned to form a conductive pattern with traces leading to the electrode pads. A protective layer having openings exposing part of the conductive pattern is formed. Each opening is covered by an electrode such as a solder bump, which is electrically connected through the conductive pattern to one of the electrode pads. This structure enables the thickness of the protective layer, which may function as a package of the semiconductor device, to be reduced. The protective layer may be formed from a photosensitive material, simplifying the formation of the openings for the electrodes.Type: ApplicationFiled: December 6, 2005Publication date: June 29, 2006Inventor: Kiyonori Watanabe
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Publication number: 20050040543Abstract: The present invention provides a semiconductor device capable of improving productivity while maintaining electrical characteristics, and a manufacturing method thereof. One characteristic point of the present invention is that a plating processing condition (A) for forming a metal wiring layer (redistribution wiring) corresponding to a first conductive layer and a plating processing condition (B) for forming a post electrode corresponding to a second conductive layer are made different from each other.Type: ApplicationFiled: July 30, 2004Publication date: February 24, 2005Inventor: Kiyonori Watanabe
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Publication number: 20040089944Abstract: A semiconductor device comprises: a base; a semiconductor chip provided on the base which includes a first main surface 20a on which a plurality of electrode pads is provided, a surface protecting film provided on the first main surface, a second main surface which opposes the first main surface, and a plurality of side surfaces between the surface of the surface protecting film and the second main surface; an insulating extension portion formed so as to surround the side surfaces of the semiconductor chip; a plurality of wiring patterns electrically connected to the electrode pads, respectively and extended from the electrode pads to the surface of the extension portion; a sealing portion formed on the wiring patterns such that a part of each of the wiring patterns is exposed; and a plurality of external terminals provided on the wiring patterns in a region including the upper side of the extension portion.Type: ApplicationFiled: October 31, 2003Publication date: May 13, 2004Inventor: Kiyonori Watanabe
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Patent number: 6458682Abstract: An electrode pad, a surface protection film, an inter-layer insulation film, an undercoat metal layer, and a rewiring layer are formed in that order on top of an insulation film formed on a wafer. A liquid photosensitive resin film and a solid photosensitive resin film, having negative photosensitive property, respectively, are sequentially formed across the entire surface of the wafer. The liquid photosensitive resin film is made of a resin having weaker adhesion with the undercoat metal layer than that of a resin for the solid photosensitive resin film. The liquid photosensitive resin film and the solid photosensitive resin film are subjected to exposure and development, thereby forming an opening for forming a bump electrode therein, and the bump electrode is formed inside the opening for forming the bump electrode. Practically at the same time when the liquid photosensitive resin film is removed by use of a removing solvent, the solid photosensitive resin film is peeled off and removed.Type: GrantFiled: February 28, 2001Date of Patent: October 1, 2002Assignee: Oki Electric Industry Co, Ltd.Inventor: Kiyonori Watanabe
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Publication number: 20010051421Abstract: An electrode pad, a surface protection film, an inter-layer insulation film, an undercoat metal layer, and a rewiring layer are formed in that order on top of an insulation film formed on a wafer. A liquid photosensitive resin film and a solid photosensitive resin film, having negative photosensitive property, respectively, are sequentially formed across the entire surface of the wafer. The liquid photosensitive resin film is made of a resin having weaker adhesion with the undercoat metal layer than that of a resin for the solid photosensitive resin film. The liquid photosensitive resin film and the solid photosensitive resin film are subjected to exposure and development, thereby forming an opening for forming a bump electrode therein, and the bump electrode is formed inside the opening for forming the bump electrode. Practically at the same time when the liquid photosensitive resin film is removed by use of a removing solvent, the solid photosensitive resin film is peeled off and removed.Type: ApplicationFiled: February 28, 2001Publication date: December 13, 2001Inventor: Kiyonori Watanabe