Patents by Inventor Kiyoshi Arai

Kiyoshi Arai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11901326
    Abstract: An object is to provide a semiconductor device which suppresses poor bonding between a metal pattern and an electrode terminal due to insufficient temperature rise at the time of bonding the metal pattern and the electrode terminal. The electrode terminal is branched into a plurality of branch portions in a width direction on one end side of an extending direction thereof, of the plurality of branch portions, a first branch portion and a second branch portion are bonded on the metal pattern via a bonding material, respectively, the first branch portion has a wider width than that of the second branch portion, and the bonding material between the second branch portion and the metal pattern is thinner than the bonding material between the first branch portion and the metal pattern.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: February 13, 2024
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shinsuke Asada, Satoru Ishikawa, Yuki Yano, Shohei Ogawa, Kiyoshi Arai
  • Publication number: 20230411253
    Abstract: Even if there is a change in the shape of a transfer mold power module is required, a change in a position of the electrode of the module is facilitated by separating electrode terminals of a power module from the electrodes and retrofitting the separated electrode terminals to the electrodes with high precision. A semiconductor device includes a mold resin enclosing a semiconductor chip, an electrode electrically connected to the semiconductor chip and exposed in an opening provided in the mold resin, and an electrode terminal having a contact portion that covers the electrode and is in electrical contact with the electrode, a plurality of projections formed to surround the contact portion and provided between a side surface of the opening and the contact portion, a contact end portion having the contact portion and an open end portion which is a different end portion from the contact end portion.
    Type: Application
    Filed: March 17, 2023
    Publication date: December 21, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventors: Taketoshi SHIKANO, Kotaro NISHIHARA, Kiyoshi ARAI, Shinya SONEDA
  • Publication number: 20220254749
    Abstract: An object is to provide a semiconductor device which suppresses poor bonding between a metal pattern and an electrode terminal due to insufficient temperature rise at the time of bonding the metal pattern and the electrode terminal. The electrode terminal is branched into a plurality of branch portions in a width direction on one end side of an extending direction thereof, of the plurality of branch portions, a first branch portion and a second branch portion are bonded on the metal pattern via a bonding material, respectively, the first branch portion has a wider width than that of the second branch portion, and the bonding material between the second branch portion and the metal pattern is thinner than the bonding material between the first branch portion and the metal pattern.
    Type: Application
    Filed: December 9, 2021
    Publication date: August 11, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shinsuke ASADA, Satoru ISHIKAWA, Yuki YANO, Shohei OGAWA, Kiyoshi ARAI
  • Patent number: 10522482
    Abstract: An object of the present invention is to obtain a semiconductor device having highly reliable bonding portions. The semiconductor device according to the present invention includes an insulating substrate on which a conductive pattern is formed, and an electrode terminal and a semiconductor element which are bonded to the conductive pattern, the electrode terminal and the conductive pattern are bonded by ultrasonic bonding on a bonding face, and the ultrasonic bonding is performed at a plurality of positions.
    Type: Grant
    Filed: December 31, 2018
    Date of Patent: December 31, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yumie Kitajima, Tatunori Yanagimoto, Kiyoshi Arai
  • Patent number: 10475721
    Abstract: In a power semiconductor device, an IGBT has a collector electrode bonded to a metal plate by a bonding material. A diode has a cathode electrode bonded to the metal plate by the bonding material. An interconnection member is bonded to an emitter electrode of the IGBT by a bonding material. The bonding material includes a bonding material and a bonding material. The bonding material is interposed between the IGBT and the interconnection member. The bonding material fills a through hole formed in the interconnection member. The bonding material reaches the bonding material and is therefore connected to the bonding material.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: November 12, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yasunari Hino, Kiyoshi Arai
  • Publication number: 20190214326
    Abstract: In a power semiconductor device, an IGBT has a collector electrode bonded to a metal plate by a bonding material. A diode has a cathode electrode bonded to the metal plate by the bonding material. An interconnection member is bonded to an emitter electrode of the IGBT by a bonding material. The bonding material includes a bonding material and a bonding material. The bonding material is interposed between the IGBT and the interconnection member. The bonding material fills a through hole formed in the interconnection member. The bonding material reaches the bonding material and is therefore connected to the bonding material.
    Type: Application
    Filed: March 12, 2019
    Publication date: July 11, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yasunari HINO, Kiyoshi ARAI
  • Publication number: 20190175551
    Abstract: Provided is a pharmaceutical composition for treating a renal disease. The pharmaceutical composition for treating a renal disease comprises a mineralocorticoid receptor antagonist.
    Type: Application
    Filed: September 20, 2018
    Publication date: June 13, 2019
    Applicant: Daiichi Sankyo Company, Limited
    Inventors: Kiyoshi Arai, Tsuyoshi Homma, Tomoko Sawanobori, Shin Nakajima, Rie Hisatomi, Motonobu Yoshimura
  • Publication number: 20190139906
    Abstract: An object of the present invention is to obtain a semiconductor device having highly reliable bonding portions. The semiconductor device according to the present invention includes an insulating substrate on which a conductive pattern is formed, and an electrode terminal and a semiconductor element which are bonded to the conductive pattern, the electrode terminal and the conductive pattern are bonded by ultrasonic bonding on a bonding face, and the ultrasonic bonding is performed at a plurality of positions.
    Type: Application
    Filed: December 31, 2018
    Publication date: May 9, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yumie KITAJIMA, Tatunori YANAGIMOTO, Kiyoshi ARAI
  • Patent number: 10283430
    Abstract: In a power semiconductor device, an IGBT has a collector electrode bonded to a metal plate by a bonding material. A diode has a cathode electrode bonded to the metal plate by the bonding material. An interconnection member is bonded to an emitter electrode of the IGBT by a bonding material. The bonding material includes a bonding material and a bonding material. The bonding material is interposed between the IGBT and the interconnection member. The bonding material fills a through hole formed in the interconnection member. The bonding material reaches the bonding material and is therefore connected to the bonding material.
    Type: Grant
    Filed: August 11, 2016
    Date of Patent: May 7, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yasunari Hino, Kiyoshi Arai
  • Patent number: 10111858
    Abstract: A pharmaceutical for the prophylaxis or treatment of hypertension or a disease derived from hypertension. The pharmaceutical is characterized by comprising (i) a specific mineralocorticoid receptor antagonist and (ii) one or more components selected from the following components (A) to (C), for administration simultaneously or separately at a time interval: (A) an angiotensin II receptor antagonist, (B) a calcium antagonist, and (C) a diuretic.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: October 30, 2018
    Assignee: Daiichi Sankyo Company, Limited
    Inventors: Kiyoshi Arai, Tsuyoshi Homma, Makoto Mizuno
  • Publication number: 20180036281
    Abstract: A pharmaceutical for the prophylaxis or treatment of hypertension or a disease derived from hypertension. The pharmaceutical is characterized by comprising (i) a specific mineralocorticoid receptor antagonist and (ii) one or more components selected from the following components (A) to (C), for administration simultaneously or separately at a time interval: (A) an angiotensin II receptor antagonist, (B) a calcium antagonist, and (C) a diuretic.
    Type: Application
    Filed: October 2, 2017
    Publication date: February 8, 2018
    Applicant: Daiichi Sankyo Company, Limited
    Inventors: Kiyoshi Arai, Tsuyoshi Homma, Makoto Mizuno
  • Publication number: 20170207179
    Abstract: An object of the present invention is to obtain a semiconductor device having highly reliable bonding portions. The semiconductor device according to the present invention includes an insulating substrate on which a conductive pattern is formed, and an electrode terminal and a semiconductor element which are bonded to the conductive pattern, the electrode terminal and the conductive pattern are bonded by ultrasonic bonding on a bonding face, and the ultrasonic bonding is performed at a plurality of positions.
    Type: Application
    Filed: August 28, 2014
    Publication date: July 20, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yumie KITAJIMA, Tatunori YANAGIMOTO, Kiyoshi ARAI
  • Publication number: 20170178995
    Abstract: In a power semiconductor device, an IGBT has a collector electrode bonded to a metal plate by a bonding material. A diode has a cathode electrode bonded to the metal plate by the bonding material. An interconnection member is bonded to an emitter electrode of the IGBT by a bonding material. The bonding material includes a bonding material and a bonding material. The bonding material is interposed between the IGBT and the interconnection member. The bonding material fills a through hole formed in the interconnection member. The bonding material reaches the bonding material and is therefore connected to the bonding material.
    Type: Application
    Filed: August 11, 2016
    Publication date: June 22, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yasunari HINO, Kiyoshi ARAI
  • Publication number: 20160206593
    Abstract: A pharmaceutical for the prophylaxis or treatment of hypertension or a disease derived from hypertension. The pharmaceutical is characterized by comprising (i) a specific mineralocorticoid receptor antagonist and (ii) one or more components selected from the following components (A) to (C), for administration simultaneously or separately at a time interval: (A) an angiotensin II receptor antagonist, (B) a calcium antagonist, and (C) a diuretic.
    Type: Application
    Filed: January 14, 2016
    Publication date: July 21, 2016
    Applicant: Daiichi Sankyo Company, Limited
    Inventors: Kiyoshi Arai, Tsuyoshi Homma, Makoto Mizuno
  • Patent number: 9171773
    Abstract: A semiconductor device according to the present invention includes a base plate, an insulating layer provided on an upper surface of the base plate, a metal pattern provided on an upper surface of the insulating layer, a semiconductor element bonded to the metal pattern, and an insulating substrate disposed to be in contact with an upper surface of the semiconductor element. An end of the insulating substrate is located outside the semiconductor element in plan view. The end of the insulating substrate and the metal pattern are directly or indirectly bonded. The semiconductor element includes an electrode on the upper surface. A portion of the insulating substrate, in which the electrode on the upper surface of the semiconductor element overlaps in plan view, is provided with a through-hole.
    Type: Grant
    Filed: April 4, 2014
    Date of Patent: October 27, 2015
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kiyoshi Arai, Osamu Usui
  • Publication number: 20150008570
    Abstract: A semiconductor device according to the present invention includes a base plate, an insulating layer provided on an upper surface of the base plate, a metal pattern provided on an upper surface of the insulating layer, a semiconductor element bonded to the metal pattern, and an insulating substrate disposed to be in contact with an upper surface of the semiconductor element. An end of the insulating substrate is located outside the semiconductor element in plan view. The end of the insulating substrate and the metal pattern are directly or indirectly bonded. The semiconductor element includes an electrode on the upper surface. A portion of the insulating substrate, in which the electrode on the upper surface of the semiconductor element overlaps in plan view, is provided with a through-hole.
    Type: Application
    Filed: April 4, 2014
    Publication date: January 8, 2015
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kiyoshi ARAI, Osamu USUI
  • Patent number: 8610263
    Abstract: A P-side package unit and a N-side package unit are arranged on a main surface of a metal heatsink such that a main surface extends in a direction perpendicular to the main surface of the heatsink. Each of the P-side package unit and the N-side package unit is fixed by an end edge portion of a heatsink being clipped by a rail-shaped unit mounting part provided on the main surface of the heatsink.
    Type: Grant
    Filed: October 20, 2010
    Date of Patent: December 17, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yasunari Hino, Kiyoshi Arai
  • Patent number: 8421087
    Abstract: A semiconductor module having one or more silicon carbide diode elements mounted on a switching element is provided in which the temperature rise is reduced by properly disposing each of the diode elements on the switching element, to thereby provide a thermal dissipation path for the respective diode elements. The respective diode elements are arranged on a non-central portion of the switching element, to facilitate dissipation of the heat produced by each of the diode elements, whereby the temperature rise in the semiconductor module is reduced.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: April 16, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kiyoshi Arai, Gourab Majumdar
  • Patent number: 8213284
    Abstract: A recording apparatus performs recording on an optical disc recording medium which has a plurality of recording layers and is capable of having data rewritten thereon. The recording apparatus includes recording means for performing data recording on each recording layer of the recording medium and recording controlling means for controlling the recording means so that, among the plurality of recording layers, recording of dummy data is performed preferentially starting from a recording layer intended for the final user data recording operation.
    Type: Grant
    Filed: May 17, 2006
    Date of Patent: July 3, 2012
    Assignee: Sony Corporation
    Inventors: Tetsuji Kawashima, Yukio Shishido, Yoshiyuki Tokumoto, Toru Ifuku, Hiroshi Naganuma, Kiyoshi Arai, Hideho Maeda
  • Patent number: 8168985
    Abstract: A semiconductor module having one or more silicon carbide diode elements mounted on a switching element is provided in which the temperature rise is reduced by properly disposing each of the diode elements on the switching element, to thereby provide a thermal dissipation path for the respective diode elements. The respective diode elements are arranged on a non-central portion of the switching element, to facilitate dissipation of the heat produced by each of the diode elements, whereby the temperature rise in the semiconductor module is reduced.
    Type: Grant
    Filed: August 19, 2009
    Date of Patent: May 1, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kiyoshi Arai, Gourab Majumdar