Abstract: With respect to input/output requests; a microprogram controls collection of data according to the data format; data accessing divides the requests for every recording medium and performs asynchronous processing; an on-line process is carried out in view of the processing priority order of the requests; parallel accessing sets requests for each medium; buffer control assures a block buffer and a page address list before receiving requests; data accessing sets a list of CCHHR codes in response to a continuous characteristic of the stored state in the recording medium; and mode deciding judges the two data transfer modes, a page search mode and a data search mode, in response to the requests.

Abstract: In an information processing system having an upper rank apparatus and an external storage device which performs transmission and reception of data between the storage device and the upper rank apparatus, at least one of encryption and decryption of the data by use of an algorithm controlled by a desired data key is performed in the external storage device, while generation, encryption and decryption of the data key are performed on the upper rank apparatus side. By this configuration, the burden of the upper rank apparatus is largely reduced and the secrecy of data stored in the external storage device can be surely kept without spoiling the throughput of the whole system.

Abstract: A system for detecting access to a storage in a data processing apparatus which includes an address translation look-aside buffer which holds a part of an address translation table listing correspondences between logical addresses and real addresses, entry of the translation look-aside buffer being referred to upon every access to the storage. Each of the entries is added with information bit indicating whether a storage region corresponding to a given entry includes an area which is allocated for the detection of the access to the storage. Detection as to whether an address for accessing the storage is located within the area allocated for the access detection is not carried out when the identification information indicates that the storage region to be accessed does not include the area allocated for the access detection.

Abstract: A data processing apparatus for a virtual memory system including a logical address register, a real address register, a paged address translation table and an address translation buffer in which a map of a fraction of the paged address translation table is stored columnwise. Upon checking address translatability of a logical address into a real address, a bit of a translation control word contained in the column of the address translation buffer relevant to that logical address indicates whether or not a succeeding logical address is susceptible to the address translation. Necessity to pretest the address translatability of every logical address is obviated. System overhead is considerably reduced.

Abstract: An instruction storage for storing microinstructions or macroinstructions is disclosed. Each instruction word includes error check and correction bits to enable error correction when an error is detected, and a plurality of instructions are assembled from each instruction word.