Patents by Inventor Kiyotaka KIMURA
Kiyotaka KIMURA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11948515Abstract: A low-power display device is provided. The display device is provided with a plurality of display portions. A data driver circuit and an addition circuit are provided to have a region overlapping with the display portion. First analog data is output from the data driver circuit in the case where first digital data consisting of a first digital value is input to the data driver circuit, whereas second analog data is output from the data driver circuit in the case where second digital data consisting of a second digital value is input to the data driver circuit. The addition circuit generates analog data corresponding to digital data that has a high-order bit that is the first digital value and a low-order bit that is the second digital value, by adding the second analog data to the first analog data. An output terminal of the data driver circuit is directly connected to an input terminal of the addition circuit without through an amplifier circuit.Type: GrantFiled: March 15, 2021Date of Patent: April 2, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kouhei Toyotaka, Kiyotaka Kimura, Hidetomo Kobayashi, Kei Takahashi
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Patent number: 11933974Abstract: An object is to provide an electronic device capable of recognizing a user's facial feature accurately. A glasses-type electronic device includes a first optical component, a second optical component, a frame, an imaging device, a feature extraction unit, and an emotion estimation unit. The frame is in contact with a side surface of the first optical component and a side surface of the second optical component. The imaging device is in contact with the frame and has a function of detecting part of a user's face. The feature extraction unit has a function of extracting a feature of the user's face from the detected part of the user's face. The emotion estimation unit has a function of estimating information on the user from the extracted feature.Type: GrantFiled: February 13, 2020Date of Patent: March 19, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Takayuki Ikeda, Hidetomo Kobayashi, Hideaki Shishido, Kiyotaka Kimura, Takashi Nakagawa, Kosei Nei, Kentaro Hayashi
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Publication number: 20240062724Abstract: A high-definition display device is provided. A small display device is provided. In the display device, a first layer and a second layer are stacked and provided. The first layer includes a gate driver circuit and a source driver circuit, and the second layer includes a display portion. The gate driver circuit and the source driver circuit are provided to include a region overlapping with the display portion. The gate driver circuit and the source driver circuit have an overlap region where they are not strictly separated from each other. Five or more gate driver circuits and five or more source driver circuits can be provided.Type: ApplicationFiled: October 16, 2023Publication date: February 22, 2024Inventors: Takayuki IKEDA, Hidetomo KOBAYASHI, Hideaki SHISHIDO, Kiyotaka KIMURA, Takashi NAKAGAWA, Kosei NEI
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Patent number: 11888446Abstract: A semiconductor device with a novel structure is provided. The semiconductor device includes a mixer circuit including a digital-analog converter circuit, a control circuit for controlling the digital-analog converter circuit, a power source control switch, and a plurality of Gilbert circuits. The plurality of Gilbert circuits each include an analog potential holding circuit for holding an analog potential output from the digital-analog converter circuit. The control circuit has a function of outputting a signal for controlling the analog potential holding circuit and the digital-analog converter circuit. The power source control switch has a function of stopping supply of a power source voltage to the control circuit in a period during which the analog potential held in the analog potential holding circuit is not updated. The analog potential holding circuit includes a first transistor. The first transistor includes a semiconductor layer including an oxide semiconductor in a channel formation region.Type: GrantFiled: April 27, 2020Date of Patent: January 30, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kiyotaka Kimura, Takeya Hirose, Hidetomo Kobayashi, Takayuki Ikeda
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Publication number: 20240006674Abstract: A sensor capable of detecting local expansion or the like is provided, and a storage battery system including a safety system such as the sensor and a secondary battery is provided. The storage battery system includes a first secondary battery and a second secondary battery each including an exterior body holding an electrolyte solution, a positive electrode, and a negative electrode; a sensor member provided to be in contact with part of the exterior body; and a detection circuit controlling the sensor member. The first secondary battery includes a memory unit storing data collected with gas introduction into the second secondary battery, a learning model constructed on the basis of the data, and an estimated value obtained using the learning model; and a unit providing information based on the estimated value.Type: ApplicationFiled: December 2, 2021Publication date: January 4, 2024Inventors: Takeshi OSADA, Takayuki IKEDA, Yosuke TSUKAMOTO, Hiroki INOUE, Kiyotaka KIMURA, Shunsuke SATO, Toshiki MIZUGUCHI
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Publication number: 20230408595Abstract: Provided is a power storage system, a secondary battery control system, a secondary battery measurement circuit, or the like that consumes low power. Provided is a power storage system, a secondary battery control system, a secondary battery measurement circuit, or the like that is highly integrated. The power storage system includes a secondary battery and a measurement circuit; the measurement circuit includes a resistor, a capacitor, and an inductor; one terminal of the resistor is electrically connected to one electrode of the capacitor; the other terminal of the resistor is electrically connected to one terminal of the inductor; one terminal of the inductor is electrically connected to a positive electrode of the secondary battery; and the measurement circuit has a function of measuring impedance of the secondary battery by measuring current of the resistor.Type: ApplicationFiled: November 12, 2021Publication date: December 21, 2023Inventors: Takayuki IKEDA, Yosuke TSUKAMOTO, Takeshi OSADA, Hiroki INOUE, Kiyotaka KIMURA, Shunsuke SATO, Toshiki MIZUGUCHI
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Patent number: 11847942Abstract: A semiconductor device using a pass transistor is provided. The semiconductor device includes a first circuit, a second circuit, a plurality of input terminals, and an output terminal. The first circuit includes a plurality of first transistors functioning as pass transistors, and the second circuit includes a plurality of second transistors functioning as pass transistors. Note that the number of the first transistors is larger than the number of the second transistors, a gate of the first transistor is supplied with a first signal, and a gate of the second transistor is supplied with a second signal. The first circuit is supplied with grayscale signals through x input terminals, and the first circuit selects y grayscale signals of the grayscale signals with the first signal. The second circuit is supplied with y (y<x) grayscale signals, the second circuit outputs z (z<y) grayscale signals of the y grayscale signals to the output terminal with the second signal.Type: GrantFiled: February 10, 2021Date of Patent: December 19, 2023Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kouhei Toyotaka, Kiyotaka Kimura
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Patent number: 11842002Abstract: To provide an inexpensive display device. The display device includes a pixel and an IC chip. The pixel includes a first pixel circuit including a display element and a second pixel circuit including a light-receiving device. The one IC chip includes a control circuit, a data driver circuit, and a read circuit. The first and second pixel circuits are electrically connected to the read circuit. The control circuit has a function of controlling driving of the data driver circuit and the read circuit. The data driver circuit has a function of supplying image data to the first pixel circuit. The read circuit has a function of outputting a monitor signal corresponding to a monitor current when the monitor current flows through the first pixel circuit. The read circuit also has a function of outputting an imaging signal corresponding to imaging data acquired by the second pixel circuit.Type: GrantFiled: September 22, 2020Date of Patent: December 12, 2023Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Kei Takahashi, Hidetomo Kobayashi, Hajime Kimura, Takeshi Osada, Hideaki Shishido, Kiyotaka Kimura, Shuichi Katsui, Takeya Hirose, Takayuki Ikeda
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Publication number: 20230387147Abstract: An imaging device capable of image processing is provided. The imaging device can retain analog data (image data) obtained by an image-capturing operation in a pixel and perform a product-sum operation of the analog data and a predetermined weight coefficient in the pixel to convert the data into binary data. When the binary data is taken in a neural network or the like, processing such as image recognition can be performed. Since enormous volumes of image data can be retained in pixels in the state of analog data, processing can be performed efficiently.Type: ApplicationFiled: August 9, 2023Publication date: November 30, 2023Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Takayuki IKEDA, Yoshiyuki KUROKAWA, Shintaro HARADA, Hidetomo KOBAYASHI, Roh YAMAMOTO, Kiyotaka KIMURA, Takashi NAKAGAWA, Yusuke NEGORO
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Publication number: 20230386383Abstract: A display device with a narrower frame can be provided. In the display device, a first layer, a second layer, and a third layer are provided to be stacked. The first layer includes a gate driver circuit and a data driver circuit, the second layer includes a demultiplexer circuit, and the third layer includes a display portion. In the display portion, pixels are arranged in a matrix, an input terminal of the demultiplexer circuit is electrically connected to the data driver circuit, and an output terminal of the demultiplexer circuit is electrically connected to some of the pixels. The gate driver circuit and the data driver circuit are provided to include a region overlapping some of the pixels. The gate driver circuit and the data driver circuit have a region where they are not strictly separated from each other and overlap each other. Five or more gate driver circuits and five or more data driver circuits can be provided.Type: ApplicationFiled: April 6, 2023Publication date: November 30, 2023Inventors: Takashi NAKAGAWA, Takayuki IKEDA, Hidetomo KOBAYASHI, Hideaki SHISHIDO, Shuichi KATSUI, Kiyotaka KIMURA
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Patent number: 11798491Abstract: A high-definition display device is provided. A small display device is provided. In the display device, a first layer and a second layer are stacked and provided. The first layer includes a gate driver circuit and a source driver circuit, and the second layer includes a display portion. The gate driver circuit and the source driver circuit are provided to include a region overlapping with the display portion. The gate driver circuit and the source driver circuit have an overlap region where they are not strictly separated from each other. Five or more gate driver circuits and five or more source driver circuits can be provided.Type: GrantFiled: August 15, 2022Date of Patent: October 24, 2023Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takayuki Ikeda, Hidetomo Kobayashi, Hideaki Shishido, Kiyotaka Kimura, Takashi Nakagawa, Kosei Nei
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Patent number: 11728355Abstract: An imaging device capable of image processing is provided. The imaging device can retain analog data (image data) obtained by an image-capturing operation in a pixel and perform a product-sum operation of the analog data and a predetermined weight coefficient in the pixel to convert the data into binary data. When the binary data is taken in a neural network or the like, processing such as image recognition can be performed. Since enormous volumes of image data can be retained in pixels in the state of analog data, processing can be performed efficiently.Type: GrantFiled: August 17, 2021Date of Patent: August 15, 2023Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takayuki Ikeda, Yoshiyuki Kurokawa, Shintaro Harada, Hidetomo Kobayashi, Roh Yamamoto, Kiyotaka Kimura, Takashi Nakagawa, Yusuke Negoro
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Patent number: 11727873Abstract: A semiconductor device with low power consumption is provided. A semiconductor device that operates at high speed is provided. A semiconductor device with a small circuit area is provided. A novel semiconductor device is provided. In the semiconductor device, a signal line is electrically connected to a plurality of pixels between a first node and a second node; an amplifier circuit has a function of amplifying a supplied current and supplying the amplified current to the first node; an analog-to-digital converter circuit has a function of converting a potential of the first node into a first signal, and a function of converting a potential of the second node into a second signal; a sensing circuit has a function of comparing the first signal and the second signal and generating a third signal; and the current amplification factor of the amplifier circuit is determined in accordance with the third signal.Type: GrantFiled: April 28, 2020Date of Patent: August 15, 2023Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kiyotaka Kimura, Hidetomo Kobayashi, Takayuki Ikeda
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Publication number: 20230138701Abstract: A low-power display device is provided. The display device is provided with a plurality of display portions. A data driver circuit and an addition circuit are provided to have a region overlapping with the display portion. First analog data is output from the data driver circuit in the case where first digital data consisting of a first digital value is input to the data driver circuit, whereas second analog data is output from the data driver circuit in the case where second digital data consisting of a second digital value is input to the data driver circuit. The addition circuit generates analog data corresponding to digital data that has a high-order bit that is the first digital value and a low-order bit that is the second digital value, by adding the second analog data to the first analog data. An output terminal of the data driver circuit is directly connected to an input terminal of the addition circuit without through an amplifier circuit.Type: ApplicationFiled: March 15, 2021Publication date: May 4, 2023Inventors: Kouhei TOYOTAKA, Kiyotaka KIMURA, Hidetomo KOBAYASHI, Kei TAKAHASHI
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Publication number: 20230112708Abstract: A semiconductor device using a pass transistor is provided. The semiconductor device includes a first circuit, a second circuit, a plurality of input terminals, and an output terminal. The first circuit includes a plurality of first transistors functioning as pass transistors, and the second circuit includes a plurality of second transistors functioning as pass transistors. Note that the number of the first transistors is larger than the number of the second transistors, a gate of the first transistor is supplied with a first signal, and a gate of the second transistor is supplied with a second signal. The first circuit is supplied with grayscale signals through x input terminals, and the first circuit selects y grayscale signals of the grayscale signals with the first signal. The second circuit is supplied withy (y<x) grayscale signals, the second circuit outputs z (z<y) grayscale signals of they grayscale signals to the output terminal with the second signal.Type: ApplicationFiled: February 10, 2021Publication date: April 13, 2023Inventors: Kouhei TOYOTAKA, Kiyotaka KIMURA
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Patent number: 11626052Abstract: A display device with a narrower frame can be provided. In the display device, a first layer, a second layer, and a third layer are provided to be stacked. The first layer includes a gate driver circuit and a data driver circuit, the second layer includes a demultiplexer circuit, and the third layer includes a display portion. In the display portion, pixels are arranged in a matrix, an input terminal of the demultiplexer circuit is electrically connected to the data driver circuit, and an output terminal of the demultiplexer circuit is electrically connected to some of the pixels. The gate driver circuit and the data driver circuit are provided to include a region overlapping some of the pixels. The gate driver circuit and the data driver circuit have a region where they are not strictly separated from each other and overlap each other. Five or more gate driver circuits and five or more data driver circuits can be provided.Type: GrantFiled: April 28, 2020Date of Patent: April 11, 2023Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takashi Nakagawa, Takayuki Ikeda, Hidetomo Kobayashi, Hideaki Shishido, Shuichi Katsui, Kiyotaka Kimura
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Publication number: 20230022181Abstract: A high-definition display device is provided. A small display device is provided. In the display device, a first layer and a second layer are stacked and provided. The first layer includes a gate driver circuit and a source driver circuit, and the second layer includes a display portion. The gate driver circuit and the source driver circuit are provided to include a region overlapping with the display portion. The gate driver circuit and the source driver circuit have an overlap region where they are not strictly separated from each other. Five or more gate driver circuits and five or more source driver circuits can be provided.Type: ApplicationFiled: August 15, 2022Publication date: January 26, 2023Inventors: Takayuki IKEDA, Hidetomo KOBAYASHI, Hideaki SHISHIDO, Kiyotaka KIMURA, Takashi NAKAGAWA, Kosei NEI
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Patent number: 11510002Abstract: A semiconductor device with a novel structure which can identify the sound source is provided. The semiconductor device includes a microphone array, delay circuits, and a signal processing circuit. The delay circuit includes a first selection circuit, which selects a microphone, signal retention circuits, which retain voltages depending on the sound signal, and a second selection circuit, which selects a signal retention circuit. Each signal retention circuit includes a transistor which includes a semiconductor layer including an oxide semiconductor in its channel formation region. The first selection circuit writes the voltage of discreet sound signals to the signal retention circuit. The second selection circuit selects at different timings the voltages which are retained in the signal retention circuit and generates the output signal corresponding to the delayed sound signal.Type: GrantFiled: August 23, 2019Date of Patent: November 22, 2022Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takayuki Ikeda, Kiyotaka Kimura, Takeya Hirose
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Publication number: 20220350432Abstract: To provide an inexpensive display device. The display device includes a pixel and an IC chip. The pixel includes a first pixel circuit including a display element and a second pixel circuit including a light-receiving device. The one IC chip includes a control circuit, a data driver circuit, and a read circuit. The first and second pixel circuits are electrically connected to the read circuit. The control circuit has a function of controlling driving of the data driver circuit and the read circuit. The data driver circuit has a function of supplying image data to the first pixel circuit. The read circuit has a function of outputting a monitor signal corresponding to a monitor current when the monitor current flows through the first pixel circuit. The read circuit also has a function of outputting an imaging signal corresponding to imaging data acquired by the second pixel circuit.Type: ApplicationFiled: September 22, 2020Publication date: November 3, 2022Inventors: Kei TAKAHASHI, Hidetomo KOBAYASHI, Hajime KIMURA, Takeshi OSADA, Hideaki SHISHIDO, Kiyotaka KIMURA, Shuichi KATSUI, Takeya HIROSE, Takayuki IKEDA
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Publication number: 20220286090Abstract: A semiconductor device with a novel structure is provided. The semiconductor device includes a mixer circuit including a digital-analog converter circuit, a control circuit for controlling the digital-analog converter circuit, a power source control switch, and a plurality of Gilbert circuits. The plurality of Gilbert circuits each include an analog potential holding circuit for holding an analog potential output from the digital-analog converter circuit. The control circuit has a function of outputting a signal for controlling the analog potential holding circuit and the digital-analog converter circuit. The power source control switch has a function of stopping supply of a power source voltage to the control circuit in a period during which the analog potential held in the analog potential holding circuit is not updated. The analog potential holding circuit includes a first transistor. The first transistor includes a semiconductor layer including an oxide semiconductor in a channel formation region.Type: ApplicationFiled: April 27, 2020Publication date: September 8, 2022Inventors: Kiyotaka KIMURA, Takeya HIROSE, Hidetomo KOBAYASHI, Takayuki IKEDA