Patents by Inventor Kiyotaka Matsuo

Kiyotaka Matsuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10761950
    Abstract: According to one embodiment, a storage device includes a nonvolatile memory, controller and interface. The nonvolatile memory stores data. The controller controls the operation of the nonvolatile memory. The interface includes first and second input/output units that transmit and receive a signal with respect to a host device. The first and second input/output units are set on the first hierarchy having the same communication function. The interface issues a connection request to the first input/output unit and when the connection request to the first input/output unit is rejected, the interface issues the connection request to the second input/output unit.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: September 1, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Kiyotaka Matsuo
  • Publication number: 20190324871
    Abstract: According to one embodiment, a storage device includes a nonvolatile memory, controller and interface. The nonvolatile memory stores data. The controller controls the operation of the nonvolatile memory. The interface includes first and second input/output units that transmit and receive a signal with respect to a host device. The first and second input/output units are set on the first hierarchy having the same communication function. The interface issues a connection request to the first input/output unit and when the connection request to the first input/output unit is rejected, the interface issues the connection request to the second input/output unit.
    Type: Application
    Filed: July 2, 2019
    Publication date: October 24, 2019
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventor: Kiyotaka MATSUO
  • Patent number: 10387277
    Abstract: According to one embodiment, a storage device includes a nonvolatile memory, controller and interface. The nonvolatile memory stores data. The controller controls the operation of the nonvolatile memory. The interface includes first and second input/output units that transmit and receive a signal with respect to a host device. The first and second input/output units are set on the first hierarchy having the same communication function. The interface issues a connection request to the first input/output unit and when the connection request to the first input/output unit is rejected, the interface issues the connection request to the second input/output unit.
    Type: Grant
    Filed: March 14, 2018
    Date of Patent: August 20, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Kiyotaka Matsuo
  • Publication number: 20180203772
    Abstract: According to one embodiment, a storage device includes a nonvolatile memory, controller and interface. The nonvolatile memory stores data. The controller controls the operation of the nonvolatile memory. The interface includes first and second input/output units that transmit and receive a signal with respect to a host device. The first and second input/output units are set on the first hierarchy having the same communication function. The interface issues a connection request to the first input/output unit and when the connection request to the first input/output unit is rejected, the interface issues the connection request to the second input/output unit.
    Type: Application
    Filed: March 14, 2018
    Publication date: July 19, 2018
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventor: Kiyotaka MATSUO
  • Patent number: 9952945
    Abstract: According to one embodiment, a storage device includes a nonvolatile memory, controller and interface. The nonvolatile memory stores data. The controller controls the operation of the nonvolatile memory. The interface includes first and second input/output units that transmit and receive a signal with respect to a host device. The first and second input/output units are set on the first hierarchy having the same communication function. The interface issues a connection request to the first input/output unit and when the connection request to the first input/output unit is rejected, the interface issues the connection request to the second input/output unit.
    Type: Grant
    Filed: July 5, 2013
    Date of Patent: April 24, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Kiyotaka Matsuo
  • Patent number: 9904807
    Abstract: A memory system includes a controller configured to write data to a nonvolatile memory. The controller includes a buffer unit configured to hold write data including a plurality of pieces of unit data, a sequencer configured to receive the write data from the buffer unit and individually output the plurality of pieces of unit data sequentially, and a plurality of cores, each being configured to encrypt at least one of the pieces of unit data output from the sequencer. The buffer is further configured to output the plurality of pieces of unit data sequentially to the sequencer, such that a last piece of unit data is output consecutively after a preceding piece of unit data is output.
    Type: Grant
    Filed: August 25, 2015
    Date of Patent: February 27, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Kiyotaka Matsuo
  • Patent number: 9638603
    Abstract: A spatial modulator is configured by arranging a plurality of modulating units in an X-axis direction, the modulating units each including at least one light modulating element having a fixed reflecting surface with a constant height from a base surface and a movable reflecting surface with a variable height from the base surface. The spatial modulator spatially modulates a laser beam by the plurality of modulating units. A driver circuit unit applies a voltage corresponding to a driving value to each of the plurality of modulating units, to drive the modulating units individually. A shift amount acquiring portion acquires a driving value at a reference time point and a driving value at an inspecting time point which correspond to a specific light amount value, and acquires a differential value thereof as a shift amount.
    Type: Grant
    Filed: January 22, 2016
    Date of Patent: May 2, 2017
    Assignee: SCREEN Holdings Co., Ltd.
    Inventors: Kiyotaka Matsuo, Yuichi Hanada
  • Patent number: 9619177
    Abstract: According to one embodiment, a system includes first to third managers and a storage unit. The first manager generates read requests corresponding to read-unit data items read by a read command received from an device, and manages first information indicating the state of transmission of the read-unit data items to the device. The storage unit temporarily stores the read-unit data items read from nonvolatile memories in a random order, based on the read requests. The second manager manages second information indicating whether each read-unit data item has been read from the nonvolatile memories. The third manager transmits, based on the first and second information, the read-unit data items to the device in an order designated by the read command, the read-unit data items being stored in the storage unit in a random order.
    Type: Grant
    Filed: August 16, 2016
    Date of Patent: April 11, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuhito Okita, Kiyotaka Matsuo
  • Publication number: 20160357483
    Abstract: According to one embodiment, a system includes first to third managers and a storage unit. The first manager generates read requests corresponding to read-unit data items read by a read command received from an device, and manages first information indicating the state of transmission of the read-unit data items to the device. The storage unit temporarily stores the read-unit data items read from nonvolatile memories in a random order, based on the read requests. The second manager manages second information indicating whether each read-unit data item has been read from the nonvolatile memories. The third manager transmits, based on the first and second information, the read-unit data items to the device in an order designated by the read command, the read-unit data items being stored in the storage unit in a random order.
    Type: Application
    Filed: August 16, 2016
    Publication date: December 8, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuhito OKITA, Kiyotaka MATSUO
  • Publication number: 20160223428
    Abstract: A spatial modulator is configured by arranging a plurality of modulating units in an X-axis direction, the modulating units each including at least one light modulating element having a fixed reflecting surface with a constant height from a base surface and a movable reflecting surface with a variable height from the base surface. The spatial modulator spatially modulates a laser beam by the plurality of modulating units. A driver circuit unit applies a voltage corresponding to a driving value to each of the plurality of modulating units, to drive the modulating units individually. A shift amount acquiring portion acquires a driving value at a reference time point and a driving value at an inspecting time point which correspond to a specific light amount value, and acquires a differential value thereof as a shift amount.
    Type: Application
    Filed: January 22, 2016
    Publication date: August 4, 2016
    Inventors: Kiyotaka MATSUO, Yuichi HANADA
  • Publication number: 20160203342
    Abstract: A memory system includes a controller configured to write data to a nonvolatile memory. The controller includes a buffer unit configured to hold write data including a plurality of pieces of unit data, a sequencer configured to receive the write data from the buffer unit and individually output the plurality of pieces of unit data sequentially, and a plurality of cores, each being configured to encrypt at least one of the pieces of unit data output from the sequencer. The buffer is further configured to output the plurality of pieces of unit data sequentially to the sequencer, such that a last piece of unit data is output consecutively after a preceding piece of unit data is output.
    Type: Application
    Filed: August 25, 2015
    Publication date: July 14, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kiyotaka MATSUO
  • Publication number: 20150227472
    Abstract: According to one embodiment, a memory system includes a controller. The controller includes a key output unit, a plurality of cores, a first sequencer, and a second sequencer. The first sequencer sequentially acquires first data as second data items and third data. The first sequencer causes the key output unit to output a first key and distributes the plurality of second data items which are sequentially acquired to the plurality of cores. The first sequencer distributes the third data to the same first core as that to which fourth data that is acquired immediately before the third data is distributed. Before the encryption of the third data is completed, the first sequencer starts acquiring fifth data following the first data and causes the key output unit to output a first key for encrypting the fifth data. The second sequencer collects data encrypted by each of the plurality of cores.
    Type: Application
    Filed: August 8, 2014
    Publication date: August 13, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Kiyotaka MATSUO
  • Publication number: 20140289452
    Abstract: According to one embodiment, a storage device includes a nonvolatile memory, controller and interface. The nonvolatile memory stores data. The controller controls the operation of the nonvolatile memory. The interface includes first and second input/output units that transmit and receive a signal with respect to a host device. The first and second input/output units are set on the first hierarchy having the same communication function. The interface issues a connection request to the first input/output unit and when the connection request to the first input/output unit is rejected, the interface issues the connection request to the second input/output unit.
    Type: Application
    Filed: July 5, 2013
    Publication date: September 25, 2014
    Inventor: Kiyotaka MATSUO
  • Publication number: 20120151101
    Abstract: According to one embodiment, an interface controller includes a first timer, a monitoring result obtaining module, a monitoring result buffer and an adjuster. The first timer measures elapsed time from a first time point when the interface controller is connected to a first host device of a plurality of host devices and detects a first timeout based on the measured elapsed time and a first timeout value. The monitoring result obtaining module obtains, as a monitoring result, a value indicative of the elapsed time measured at a second time point when a first frame is received from the first host device after the first time point and before the first timeout is detected. The monitoring result buffer stores the monitoring result obtained. The adjuster adjusts the first timeout value based on at least one monitoring result stored in the monitoring result buffer.
    Type: Application
    Filed: November 11, 2011
    Publication date: June 14, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kiyotaka MATSUO, Nobuyuki Myouga, Hitoshi Hasegawa
  • Patent number: 5391851
    Abstract: Disclosed is a multi-point welding method capable of certainly welding an object having a number of points to be welded for a short time. First, an approximately cylindrical base body is formed by alternately laminating a flat sheet and a corrugated sheet and then winding them in a spiral shape. In this case, there exist a number of contact points of the flat sheet to the corrugated sheet, that is, points to be welded. Next, there is provided an electrode apart from one end surface of the base body by a specified interval and facing to the end surface. After that, by intermittently applying a current across the electrode and the one end surface of the base body thereby intermittently generating electric discharges between the electrode and the one end surface of the base body, to thus fuse and weld the points to be welded of the flat sheet to the corrugated sheet.
    Type: Grant
    Filed: July 13, 1992
    Date of Patent: February 21, 1995
    Assignees: Nippon Soken Inc., Nippondenso Co., Ltd.
    Inventors: Kiyotaka Matsuo, Masao Yokoi, Yasuyuki Kawabe, Ichiro Hashimoto, Keiji Ito