Patents by Inventor Klaus Theurich

Klaus Theurich has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11303296
    Abstract: Embodiments include method, systems and computer program products for compressing instrumentation data. Aspects include defining an intermediate region of memory. Instrumentation data associated with a processing device is received and stored in the intermediate region of the memory. The instrumentation data is compressed in the intermediate region of memory and stored in a sample region of memory.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: April 12, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tobias U. Bergmann, Klaus Theurich
  • Patent number: 10942789
    Abstract: A multiprocessor computer system facility is provided for selectively reallocating a logical processing unit. The logical processing unit is one logical processing unit of multiple logical processing units backed by a socket of a plurality of sockets of a multiprocessor computer system. The selectively reallocating includes: monitoring, during execution of program code, a performance metric of a hardware resource of the socket, the hardware resource being shared by the multiple logical processing units; and reassigning the logical processing unit, based on the monitoring, to a different socket of the plurality of sockets of the multiprocessor computer system to, in part, improve the performance metric of the hardware resource of the socket. The reassigning includes reassigning the logical processing unit based on the monitoring determining that a differential between a resource utilization rate of the socket and a resource utilization rate of the different socket exceeds a set threshold.
    Type: Grant
    Filed: August 13, 2019
    Date of Patent: March 9, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Oliver Benke, Hartmut E. Penner, Klaus Theurich
  • Patent number: 10592294
    Abstract: A multiprocessor computer system facility is provided for selectively reallocating a logical processing unit. The logical processing unit is one logical processing unit of multiple logical processing units backed by a socket of a plurality of sockets of a multiprocessor computer system. The selectively reallocating includes: monitoring, during execution of program code, a performance metric of a hardware resource of the socket, the hardware resource being shared by the multiple logical processing units; and reassigning the logical processing unit, based on the monitoring, to a different socket of the plurality of sockets of the multiprocessor computer system to, in part, improve the performance metric of the hardware resource of the socket. The reassigning includes reassigning the logical processing unit based on the monitoring determining that a differential between a resource utilization rate of the socket and a resource utilization rate of the different socket exceeds a set threshold.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: March 17, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Oliver Benke, Hartmut E. Penner, Klaus Theurich
  • Publication number: 20190393888
    Abstract: Embodiments include method, systems and computer program products for compressing instrumentation data. Aspects include defining an intermediate region of memory. Instrumentation data associated with a processing device is received and stored in the intermediate region of the memory. The instrumentation data is compressed in the intermediate region of memory and stored in a sample region of memory.
    Type: Application
    Filed: June 26, 2018
    Publication date: December 26, 2019
    Inventors: Tobias U. Bergmann, Klaus Theurich
  • Publication number: 20190361752
    Abstract: A multiprocessor computer system facility is provided for selectively reallocating a logical processing unit. The logical processing unit is one logical processing unit of multiple logical processing units backed by a socket of a plurality of sockets of a multiprocessor computer system. The selectively reallocating includes: monitoring, during execution of program code, a performance metric of a hardware resource of the socket, the hardware resource being shared by the multiple logical processing units; and reassigning the logical processing unit, based on the monitoring, to a different socket of the plurality of sockets of the multiprocessor computer system to, in part, improve the performance metric of the hardware resource of the socket. The reassigning includes reassigning the logical processing unit based on the monitoring determining that a differential between a resource utilization rate of the socket and a resource utilization rate of the different socket exceeds a set threshold.
    Type: Application
    Filed: August 13, 2019
    Publication date: November 28, 2019
    Inventors: Oliver BENKE, Hartmut E. PENNER, Klaus THEURICH
  • Patent number: 10409700
    Abstract: A method is provided to get a high test coverage through a large number of test cases with a minimum number of test programs. Tests are performed flexibly in various environments, using parameters in multiple dimensions. The parameters can be dynamically extracted from the machine or simulator either by controlling scripts or by the test program itself. Multiple ways are offered to execute subsets of the test combinations.
    Type: Grant
    Filed: July 12, 2017
    Date of Patent: September 10, 2019
    Assignee: International Business Machines Corporation
    Inventors: H. Eberhard Lange, Klaus Theurich
  • Patent number: 10095550
    Abstract: A multiprocessor computer system facility is provided for selectively reallocating a logical processing unit within the computer system. The logical processing unit is one logical processing unit of multiple logical processing units backed by a socket of a plurality of sockets of the multiprocessor computer system. The selectively reallocating includes: monitoring, during execution of program code of the multiple logical processing units, a performance metric of a hardware resource of the socket, the hardware resource being shared by the multiple logical processing units; and reassigning the logical processing unit, based on the monitoring, to a different socket of the plurality of sockets of the multiprocessor computer system to, in part, improve the performance metric of the hardware resource of the socket.
    Type: Grant
    Filed: October 19, 2016
    Date of Patent: October 9, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Oliver Benke, Hartmut E. Penner, Klaus Theurich
  • Publication number: 20180225154
    Abstract: A multiprocessor computer system facility is provided for selectively reallocating a logical processing unit. The logical processing unit is one logical processing unit of multiple logical processing units backed by a socket of a plurality of sockets of a multiprocessor computer system. The selectively reallocating includes: monitoring, during execution of program code, a performance metric of a hardware resource of the socket, the hardware resource being shared by the multiple logical processing units; and reassigning the logical processing unit, based on the monitoring, to a different socket of the plurality of sockets of the multiprocessor computer system to, in part, improve the performance metric of the hardware resource of the socket. The reassigning includes reassigning the logical processing unit based on the monitoring determining that a differential between a resource utilization rate of the socket and a resource utilization rate of the different socket exceeds a set threshold.
    Type: Application
    Filed: March 30, 2018
    Publication date: August 9, 2018
    Inventors: Oliver BENKE, Hartmut E. PENNER, Klaus THEURICH
  • Publication number: 20180107521
    Abstract: A multiprocessor computer system facility is provided for selectively reallocating a logical processing unit within the computer system. The logical processing unit is one logical processing unit of multiple logical processing units backed by a socket of a plurality of sockets of the multiprocessor computer system. The selectively reallocating includes: monitoring, during execution of program code of the multiple logical processing units, a performance metric of a hardware resource of the socket, the hardware resource being shared by the multiple logical processing units; and reassigning the logical processing unit, based on the monitoring, to a different socket of the plurality of sockets of the multiprocessor computer system to, in part, improve the performance metric of the hardware resource of the socket.
    Type: Application
    Filed: October 19, 2016
    Publication date: April 19, 2018
    Inventors: Oliver BENKE, Hartmut E. PENNER, Klaus THEURICH
  • Publication number: 20170308451
    Abstract: A method is provided to get a high test coverage through a large number of test cases with a minimum number of test programs. Tests are performed flexibly in various environments, using parameters in multiple dimensions. The parameters can be dynamically extracted from the machine or simulator either by controlling scripts or by the test program itself. Multiple ways are offered to execute subsets of the test combinations.
    Type: Application
    Filed: July 12, 2017
    Publication date: October 26, 2017
    Inventors: H. Eberhard Lange, Klaus Theurich
  • Patent number: 9740585
    Abstract: A method is provided to get a high test coverage through a large number of test cases with a minimum number of test programs. Tests are performed flexibly in various environments, using parameters in multiple dimensions. The parameters can be dynamically extracted from the machine or simulator either by controlling scripts or by the test program itself. Multiple ways are offered to execute subsets of the test combinations.
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: August 22, 2017
    Assignee: International Business Machines Corporation
    Inventors: H. Eberhard Lange, Klaus Theurich
  • Patent number: 9740586
    Abstract: A method is provided to get a high test coverage through a large number of test cases with a minimum number of test programs. Tests are performed flexibly in various environments, using parameters in multiple dimensions. The parameters can be dynamically extracted from the machine or simulator either by controlling scripts or by the test program itself. Multiple ways are offered to execute subsets of the test combinations.
    Type: Grant
    Filed: November 10, 2015
    Date of Patent: August 22, 2017
    Assignee: International Business Machines Corporation
    Inventors: H. Eberhard Lange, Klaus Theurich
  • Publication number: 20160378644
    Abstract: A method is provided to get a high test coverage through a large number of test cases with a minimum number of test programs. Tests are performed flexibly in various environments, using parameters in multiple dimensions. The parameters can be dynamically extracted from the machine or simulator either by controlling scripts or by the test program itself. Multiple ways are offered to execute subsets of the test combinations.
    Type: Application
    Filed: June 23, 2015
    Publication date: December 29, 2016
    Inventors: H. Eberhard Lange, Klaus Theurich
  • Publication number: 20160378627
    Abstract: A method is provided to get a high test coverage through a large number of test cases with a minimum number of test programs. Tests are performed flexibly in various environments, using parameters in multiple dimensions. The parameters can be dynamically extracted from the machine or simulator either by controlling scripts or by the test program itself. Multiple ways are offered to execute subsets of the test combinations.
    Type: Application
    Filed: November 10, 2015
    Publication date: December 29, 2016
    Inventors: H. Eberhard Lange, Klaus Theurich
  • Patent number: 7818459
    Abstract: A method and apparatus relates to hardware-to-hardware data transmission in computer systems, and in particular, it relates to method and system for operating I/O adapters attaching either one or more computing devices to an I/O periphery, to a network, or to other computing devices. It is proposed to operate a memory local to the network coupling adapter as a cache memory relative to a system memory associated with the one or more computing devices for storing transmission control information.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: October 19, 2010
    Assignee: International Business Machines Corporation
    Inventors: Gerd Konrad Bayer, Wolfgang Eckert, Markus Michael Helms, Juergen Maergner, Christoph Raisch, Thomas Schlipf, Klaus Theurich
  • Publication number: 20080120442
    Abstract: A method and apparatus relates to hardware-to-hardware data transmission in computer systems, and in particular, it relates to method and system for operating I/O adapters attaching either one or more computing devices to an I/O periphery, to a network, or to other computing devices. It is proposed to operate a memory local to the network coupling adapter as a cache memory relative to a system memory associated with the one or more computing devices for storing transmission control information.
    Type: Application
    Filed: October 31, 2007
    Publication date: May 22, 2008
    Applicant: International Business Machines Corporation
    Inventors: Gerd Konrad Bayer, Wolfgang Eckert, Markus Michael Helms, Juergen Maergner, Christoph Raisch, Thomas Schlipf, Klaus Theurich
  • Patent number: 7337240
    Abstract: A method and apparatus relates to hardware-to-hardware data transmission in computer systems, and in particular, it relates to method and system for operating I/O adapters attaching either one or more computing devices to an I/O periphery, to a network, or to other computing devices. It is proposed to operate a memory local to the network coupling adapter as a cache memory relative to a system memory associated with the one or more computing devices for storing transmission control information.
    Type: Grant
    Filed: December 6, 2001
    Date of Patent: February 26, 2008
    Assignee: International Business Machines Corporation
    Inventors: Gerd Konrad Bayer, Wolfgang Eckert, Markus Michael Helms, Juergen Maergner, Christoph Raisch, Thomas Schlipf, Klaus Theurich
  • Publication number: 20020099879
    Abstract: A method and apparatus relates to hardware-to-hardware data transmission in computer systems, and in particular, it relates to method and system for operating I/O adapters attaching either one or more computing devices to an I/O periphery, to a network, or to other computing devices. It is proposed to operate a memory local to the network coupling adapter as a cache memory relative to a system memory associated with the one or more computing devices for storing transmission control information.
    Type: Application
    Filed: December 6, 2001
    Publication date: July 25, 2002
    Applicant: IBM
    Inventors: Gerd Konrad Bayer, Wolfgang Eckert, Markus Michael Helms, Juergen Maergner, Christoph Raisch, Thomas Schlipf, Klaus Theurich