Abstract: A sputter deposition apparatus and method, and a substrate holder for use with a sputter deposition apparatus is disclosed. According to one embodiment of the invention, a sputter deposition apparatus is provided, including at least one sputter target, a first plasma, a substrate holder, and a further plasma. In one embodiment, the further plasma is an ECWR plasma. According to an additional embodiment of the invention, an anode is provided between the further plasma, and the substrate holder. According to a further embodiment, the substrate holder includes a dielectric layer with varying thickness.

Abstract: An integrated circuit including a resistive memory element and a method of manufacturing the integrated circuit are described. The method of manufacturing the integrated circuit includes depositing a switching layer material and intentionally forming inhomogeneously distributed defects within the switching layer material to increase a number of switching cycles of the resistive memory element. The resistive memory element includes a switching layer that selectively switches between a low resistance state and a high resistance state. The switching layer contains intentionally formed defects that increase the number of switching cycles of the switching layer.

Abstract: An integrated circuit including a resistive memory element and a method of manufacturing the integrated circuit are described. The method of manufacturing the integrated circuit includes depositing a switching layer material and intentionally forming inhomogeneously distributed defects within the switching layer material to increase a number of switching cycles of the resistive memory element. The resistive memory element includes a switching layer that selectively switches between a low resistance state and a high resistance state. The switching layer contains intentionally formed defects that increase the number of switching cycles of the switching layer.

Abstract: According to one aspect, an integrated circuit may comprise a first electrode, a second electrode, and a resistive switching rod extending from the first electrode to the second electrode and being at least partly embedded in a thermal barrier matrix.

Abstract: In one aspect, a resistive memory device may be implemented in an embedded system. A resistive memory may comprise a resistive switchable medium that may be electrically connected to a first and a second electrode. In one aspect the first and the second electrode may comprise a via conductor and an interconnection line of an embedded structure.

Abstract: According to one aspect, a switching element may comprise a first electrode, a second electrode, and a resistive switching region extending from the first electrode to the second electrode and comprising transition metal oxinitride.

Abstract: A sputter deposition apparatus and method, and a substrate holder for use with a sputter deposition apparatus is disclosed. According to one embodiment of the invention, a sputter deposition apparatus is provided, including at least one sputter target, a first plasma, a substrate holder, and a further plasma. In one embodiment, the further plasma is an ECWR plasma. According to an additional embodiment of the invention, an anode is provided between the further plasma, and the substrate holder. According to a further embodiment, the substrate holder includes a dielectric layer with varying thickness.

Abstract: According to the invention CBRAM cell is provided exhibiting a resistive switching effect offering the possibility to store multiple memory states in one cell by programming said memory cell to different resistance levels including at least a first memory state with a high resistance level representing a low-conductivity state of the memory cell and one memory state with a low resistance level representing a high-conductivity state of the memory cell, wherein the resistive switching effect is substantially based on a variation of the concentration of the metallic material incorporated or deposited in the matrix host material.

Abstract: Disclosed is a non-volatile memory cell including a first conductive electrode region, a second conductive electrode region and a memory region disposed therebetween. The memory region includes one or a plurality of metal oxide nanoparticles, which contact and electrically connect the first and the second electrode region via contact locations and which exhibit a bistable resistance properties when applying an external voltage.

Abstract: A memory cell for opto-electronic applications includes a substrate, a first electrode and a second electrode, and an active layer arranged between the first and the second electrodes, wherein the active layer includes a metalloporphyrin derivative, and wherein the second electrode is transparent and includes ZnO, which is doped with B, Al, Ga, or Mg.

Abstract: Disclosed is a non-volatile memory cell including a first conductive electrode region, a second conductive electrode region and a memory region disposed therebetween. The memory region includes one or a plurality of metal oxide nanoparticles, which contact and electrically connect the first and the second electrode region via contact locations and which exhibit a bistable resistance properties when applying an external voltage.

Abstract: Semiconductor molecular hybrid element with a storage cell comprising, arranged between a first and a second electrode, a layer of a self-assembled monolayer made of an organic compound, whereby the organic compound is a compound corresponding to the general formula I or II whereby R1 represents hydrogen, an alkyl chain with 1-20 C atoms, an aromatic group that can be substituted by an alkyl chain with 1-4 C atoms or by one or several functional groups, whereby at least one R1 group in the general formula I or II is an anchoring group corresponding to the formula and whereby n is an integer in the range from 1-4.

Abstract: A memory cell for opto-electronic applications includes a substrate, a first electrode and a second electrode, and an active layer arranged between the first and the second electrodes, wherein the active layer includes a metalloporphyrin derivative, and wherein the second electrode is transparent and includes ZnO, which is doped with B, Al, Ga, or Mg.

Abstract: A nonvolatile, resistively switching memory cell includes a layer arranged between a first electrode and a second electrode. The layer includes one or more chalcogenide compound(s) selected from the group consisting of CuInS, CuInSe, CdInS, CdInSe, ZnInS, MnInS, MnZnInS, ZnInSe, InS, InSSe and InSe, with alkali metal or alkaline-earth metal ions contained in the layer of the chalcogenide compound(s).

Abstract: The present invention relates to a reproducible conditioning during the manufacturing of a resistively switching CBRAM memory cell comprising a first electrode and a second electrode with an active material positioned therebetween. The active material is adapted to be placed in a more or less electroconductive state by means of electrochemical switching processes. A CBRAM memory cell manufactured pursuant to the method according to the invention has, due to the improved conditioning, more reliable and more distinctly evaluable electrical switching properties. Moreover, no more forming step is necessary with the method according to the present invention.