Patents by Inventor Kohei Mutaguchi
Kohei Mutaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7935968Abstract: A semiconductor device having a display unit, which is small in size, suppresses the defect caused by the mounting of IC chips and the like on the substrate, and operates at a high speed. A semiconductor display unit and other circuit blocks are integrally formed on the substrate having an insulating surface by using a process for fabricating TFTs that realize a high degree of mobility. Concretely, there is employed a process for crystallizing a semiconductor active layer by using a continuously oscillating laser. Further, the process for crystallization relying upon the continuously oscillating laser is selectively effected for only those circuit blocks that must be operated at high speeds, thereby to realize a high production efficiency.Type: GrantFiled: April 24, 2009Date of Patent: May 3, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kiyoshi Kato, Tadafumi Ozaki, Kohei Mutaguchi
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Patent number: 7725621Abstract: A semiconductor device and data transfer method capable of efficient DMA transfer processing. The device comprises: a sector buffer which temporarily stores data during transfer, the buffer having an I/O port used for DMA transfer with a system bus and having an I/O port used for data transfer with the I/O controller; a switching section which switches whether to connect between the system bus and the I/O controller, or to connect between the sector buffer and the I/O controller or the system bus; and a sector buffer controller which separately starts data transfer through the I/O ports and which, when detecting completion of the data transfer of a transfer unit between the sector buffer and the I/O controller, transmits to the switching section a control signal for cutting off data transfer between the sector buffer and the I/O controller and for connecting the system bus and the I/O controller.Type: GrantFiled: February 16, 2007Date of Patent: May 25, 2010Assignee: Fujitsu Microelectronics LimitedInventor: Kohei Mutaguchi
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Publication number: 20090206345Abstract: A semiconductor device having a display unit, which is small in size, suppresses the defect caused by the mounting of IC chips and the like on the substrate, and operates at a high speed. A semiconductor display unit and other circuit blocks are integrally formed on the substrate having an insulating surface by using a process for fabricating TFTs that realize a high degree of mobility. Concretely, there is employed a process for crystallizing a semiconductor active layer by using a continuously oscillating laser. Further, the process for crystallization relying upon the continuously oscillating laser is selectively effected for only those circuit blocks that must be operated at high speeds, thereby to realize a high production efficiency.Type: ApplicationFiled: April 24, 2009Publication date: August 20, 2009Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kiyoshi Kato, Tadafumi Ozaki, Kohei Mutaguchi
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Patent number: 7538348Abstract: A semiconductor device having a display unit, which is small in size, suppresses the defect caused by the mounting of IC chips and the like on the substrate, and operates at a high speed. A semiconductor display unit and other circuit blocks are integrally formed on the substrate having an insulating surface by using a process for fabricating TFTs that realize a high degree of mobility. Concretely, there is employed a process for crystallizing a semiconductor active layer by using a continuously oscillating laser. Further, the process for crystallization relying upon the continuously oscillating laser is selectively effected for only those circuit blocks that must be operated at high speeds, thereby to realize a high production efficiency.Type: GrantFiled: October 25, 2006Date of Patent: May 26, 2009Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kiyoshi Kato, Tadafumi Ozaki, Kohei Mutaguchi
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Patent number: 7524689Abstract: A semiconductor device reduced in size is provided in which the surface area outside of a display portion required for IC chips to mounted is reduced in a semiconductor device having an active matrix display portion. Further, signal wiring connection defects that accompany IC chip mounting are reduced. By manufacturing TFTs on an opposing substrate in a reflecting active matrix semiconductor device, thus manufacturing a desired logic circuit, the logic circuit, conventionally mounted externally, is formed on the opposing substrate. Further, the semiconductor device is made high speed and high performance by using suitable TFT structures and electric power source voltages for pixels and driver circuits on a pixel substrate and for the logic circuit on the opposing substrate.Type: GrantFiled: June 13, 2005Date of Patent: April 28, 2009Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kiyoshi Kato, Tadafumi Ozaki, Kohei Mutaguchi
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Publication number: 20080162746Abstract: A semiconductor apparatus comprises a data processing unit for processing data, a buffer for temporarily storing the data processed by the data processing unit, and a buffer control unit for causing the data stored in the buffer to be burst-transferred to a data storage unit. The buffer control unit allows burst-transfer of the data stored in the buffer to be started before full amount of data to be transferred in a single burst-transfer is stored in the buffer.Type: ApplicationFiled: December 28, 2007Publication date: July 3, 2008Applicant: FUJITSU LIMITEDInventors: Hirokazu Ogura, Kohei Mutaguchi
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Patent number: 7323714Abstract: In a semiconductor device with a reflective passive matrix liquid crystal display mounted thereto, the area for mounting a logic circuit is reduced, the product is reduced in size, and further the reliability is improved. A semiconductor device with a reflective passive matrix liquid crystal display mounted thereto is reduced in size by forming all or some of externally-mounted logic circuits in a region overlapping a pixel region on a substrate where a reflective electrode is formed. The present invention can also reduce the number of IC chips and the like mounted to a substrate greatly and the reliability in mounting IC chips and the like to a substrate can be improved.Type: GrantFiled: October 14, 2005Date of Patent: January 29, 2008Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kiyoshi Kato, Tadafumi Ozaki, Kohei Mutaguchi
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Publication number: 20080005387Abstract: A semiconductor device and data transfer method capable of efficient DMA transfer processing. The device comprises: a sector buffer which temporarily stores data during transfer, the buffer having an I/O port used for DMA transfer with a system bus and having an I/O port used for data transfer with the I/O controller; a switching section which switches whether to connect between the system bus and the I/O controller, or to connect between the sector buffer and the I/O controller or the system bus; and a sector buffer controller which separately starts data transfer through the I/O ports and which, when detecting completion of the data transfer of a transfer unit between the sector buffer and the I/O controller, transmits to the switching section a control signal for cutting off data transfer between the sector buffer and the I/O controller and for connecting the system bus and the I/O controller.Type: ApplicationFiled: February 16, 2007Publication date: January 3, 2008Applicant: FUJITSU LIMITEDInventor: Kohei Mutaguchi
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Patent number: 7245690Abstract: The invention provides a shift register which can function normally even with an abnormal register or a broken register while suppressing the manufacturing cost as little as possible. The shift register of the invention includes n regular registers (SR(1) to SR(n)) connected in series and n output lines (L1 to Ln) corresponding to the n regular registers, r (r?n) redundant registers (SR(n+1) to SR(n+r)) connected in series to the n regular registers, and a switch circuit for selectively connecting the regular and redundant resistors to output lines. The switch circuit connects the n regular registers to the corresponding output lines in a normal state, connects normal registers of upper and lower stages of the broken register by skipping and disabling the broken register if any, and connects normal regular registers and the same number of redundant registers as the broken registers to the n output lines.Type: GrantFiled: May 19, 2005Date of Patent: July 17, 2007Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Kohei Mutaguchi
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Patent number: 7239564Abstract: The present invention provides a high-capacity and reliable semiconductor device which does not require additional circuits for use at power ON/OFF, additional steps nor high manufacturing cost, and which has a rectifier means for rectifying a defect easily. A semiconductor device comprises a first memory means including a memory cell and a redundant memory cell each including a memory element in the region where a bit line and a word line cross each other with an insulator interposed therebetween, a second memory means for storing an address of a defective memory in the first memory means, a rectifier means including a holding means and a replacement means, and an inspection means for writing data of the second memory means to the holding means. The replacement means replaces the defective memory cell with the redundant memory cell. In addition to the aforementioned four means, a display means for displaying images is provided as well.Type: GrantFiled: November 17, 2004Date of Patent: July 3, 2007Assignee: Semiconductor Energy Laboratory, Co., Ltd.Inventor: Kohei Mutaguchi
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Patent number: 7232714Abstract: A semiconductor device having a display unit, which is small in size, suppresses the defect caused by the mounting of IC chips and the like on the substrate, and operates at a high speed. A semiconductor display unit and other circuit blocks are integrally formed on the substrate having an insulating surface by using a process for fabricating TFTs that realize a high degree of mobility. Concretely, there is employed a process for crystallizing a semiconductor active layer by using a continuously oscillating laser. Further, the process for crystallization relying upon the continuously oscillating laser is selectively effected for only those circuit blocks that must be operated at high speeds, thereby to realize a high production efficiency.Type: GrantFiled: November 27, 2002Date of Patent: June 19, 2007Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kiyoshi Kato, Tadafumi Ozaki, Kohei Mutaguchi
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Publication number: 20070040176Abstract: A semiconductor device having a display unit, which is small in size, suppresses the defect caused by the mounting of IC chips and the like on the substrate, and operates at a high speed. A semiconductor display unit and other circuit blocks are integrally formed on the substrate having an insulating surface by using a process for fabricating TFTs that realize a high degree of mobility. Concretely, there is employed a process for crystallizing a semiconductor active layer by using a continuously oscillating laser. Further, the process for crystallization relying upon the continuously oscillating laser is selectively effected for only those circuit blocks that must be operated at high speeds, thereby to realize a high production efficiency.Type: ApplicationFiled: October 25, 2006Publication date: February 22, 2007Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kiyoshi Kato, Tadafumi Ozaki, Kohei Mutaguchi
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Publication number: 20060238231Abstract: To allow changes in period and duty ratio at a desired timing without control of the timing for setting values of the period and duty ratio by a CPU, a unit 1 for storing a plurality of values of periods, a unit 2 for storing a plurality of values of duty ratios, a circuit 3 for counting the number of input clock pulses, a circuit 4 for outputting an agreement signal when the output of the circuit 3 and a value stored in the unit 2 agree with each other, a circuit 5 for outputting a pulse signal at a determined point, which is the output of the agreement signal, and a circuit 6 for selecting any period of the periods stored in the unit 1 in response to input of a control signal and outputting a value corresponding to the selected period to the unit 2, are comprised.Type: ApplicationFiled: July 26, 2005Publication date: October 26, 2006Inventor: Kohei Mutaguchi
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Publication number: 20060049405Abstract: In a semiconductor device with a reflective passive matrix liquid crystal display mounted thereto, the area for mounting a logic circuit is reduced, the product is reduced in size, and further the reliability is improved. A semiconductor device with a reflective passive matrix liquid crystal display mounted thereto is reduced in size by forming all or some of externally-mounted logic circuits in a region overlapping a pixel region on a substrate where a reflective electrode is formed. The present invention can also reduce the number of IC chips and the like mounted to a substrate greatly and the reliability in mounting IC chips and the like to a substrate can be improved.Type: ApplicationFiled: October 14, 2005Publication date: March 9, 2006Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kiyoshi Kato, Tadafumi Ozaki, Kohei Mutaguchi
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Publication number: 20050276369Abstract: The invention provides a shift register which can function normally even with an abnormal register or a broken register while suppressing the manufacturing cost as little as possible. The shift register of the invention includes n regular registers (SR(1) to SR(n)) connected in series and n output lines (L1 to Ln) corresponding to the n regular registers, r (r?n) redundant registers (SR(n+1) to SR(n+r)) connected in series to the n regular registers, and a switch circuit for selectively connecting the regular and redundant resistors to output lines. The switch circuit connects the n regular registers to the corresponding output lines in a normal state, connects normal registers of upper and lower stages of the broken register by skipping and disabling the broken register if any, and connects normal regular registers and the same number of redundant registers as the broken registers to the n output lines.Type: ApplicationFiled: May 19, 2005Publication date: December 15, 2005Inventor: Kohei Mutaguchi
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Patent number: 6956234Abstract: In a semiconductor device with a reflective passive matrix liquid crystal display mounted thereto, the area for mounting a logic circuit is reduced, the product is reduced in size, and further the reliability is improved. A semiconductor device with a reflective passive matrix liquid crystal display mounted thereto is reduced in size by forming all or some of externally-mounted logic circuits in a region overlapping a pixel region on a substrate where a reflective electrode is formed. The present invention can also reduce the number of IC chips and the like mounted to a substrate greatly and the reliability in mounting IC chips and the like to a substrate can be improved.Type: GrantFiled: November 27, 2002Date of Patent: October 18, 2005Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kiyoshi Kato, Tadafumi Ozaki, Kohei Mutaguchi
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Publication number: 20050227397Abstract: A semiconductor device reduced in size is provided in which the surface area outside of a display portion required for IC chips to mounted is reduced in a semiconductor device having an active matrix display portion. Further, signal wiring connection defects that accompany IC chip mounting are reduced. By manufacturing TFTs on an opposing substrate in a reflecting active matrix semiconductor device, thus manufacturing a desired logic circuit, the logic circuit, conventionally mounted externally, is formed on the opposing substrate. Further, the semiconductor device is made high speed and high performance by using suitable TFT structures and electric power source voltages for pixels and driver circuits on a pixel substrate and for the logic circuit on the opposing substrate.Type: ApplicationFiled: June 13, 2005Publication date: October 13, 2005Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kiyoshi Kato, Tadafumi Ozaki, Kohei Mutaguchi
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Publication number: 20050141264Abstract: The present invention provides a high-capacity and reliable semiconductor device which does not require additional circuits for use at power ON/OFF, additional steps nor high manufacturing cost, and which has a rectifier means for rectifying a defect easily. A semiconductor device comprises a first memory means including a memory cell and a redundant memory cell each including a memory element in the region where a bit line and a word line cross each other with an insulator interposed therebetween, a second memory means for storing an address of a defective memory in the first memory means, a rectifier means including a holding means and a replacement means, and an inspection means for writing data of the second memory means to the holding means. The replacement means replaces the defective memory cell with the redundant memory cell. In addition to the aforementioned four means, a display means for displaying images is provided as well.Type: ApplicationFiled: November 17, 2004Publication date: June 30, 2005Inventor: Kohei Mutaguchi
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Patent number: 6911675Abstract: A semiconductor device reduced in size is provided in which the surface area outside of a display portion required for IC chips to mounted is reduced in a semiconductor device having an active matrix display portion. Further, signal wiring connection defects that accompany IC chip mounting are reduced. By manufacturing TFTs on an opposing substrate in a reflecting active matrix semiconductor device, thus manufacturing a desired logic circuit, the logic circuit, conventionally mounted externally, is formed on the opposing substrate. Further, the semiconductor device is made high speed and high performance by using suitable TFT structures and electric power source voltages for pixels and driver circuits on a pixel substrate and for the logic circuit on the opposing substrate.Type: GrantFiled: November 29, 2002Date of Patent: June 28, 2005Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kiyoshi Kato, Tadafumi Ozaki, Kohei Mutaguchi
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Publication number: 20030231263Abstract: A semiconductor device reduced in size is provided in which the surface area outside of a display portion required for IC chips to mounted is reduced in a semiconductor device having an active matrix display portion. Further, signal wiring connection defects that accompany IC chip mounting are reduced. By manufacturing TFTs on an opposing substrate in a reflecting active matrix semiconductor device, thus manufacturing a desired logic circuit, the logic circuit, conventionally mounted externally, is formed on the opposing substrate. Further, the semiconductor device is made high speed and high performance by using suitable TFT structures and electric power source voltages for pixels and driver circuits on a pixel substrate and for the logic circuit on the opposing substrate.Type: ApplicationFiled: November 29, 2002Publication date: December 18, 2003Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kiyoshi Kato, Tadafumi Ozaki, Kohei Mutaguchi