Patents by Inventor Kohei Oasa

Kohei Oasa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240097022
    Abstract: A semiconductor device includes a semiconductor part, first to third and control electrodes. The first electrode is provided on a back surface of the semiconductor part; and the second electrode is provided on a front surface thereof. The third electrode is provided between the first and second electrodes. The third electrode extends into the semiconductor part from the front surface side thereof. The third electrode is electrically insulated from the semiconductor part via an insulating space between the semiconductor part and the third electrode. The control electrode includes first and second portions. The first portion is linked to the second portion and extends between the semiconductor part and the third electrode. The second portion is provided between the second electrode and the third electrode. The first portion faces the insulating space via the third electrode; and the second portion extends between the insulating space and the second electrode.
    Type: Application
    Filed: February 2, 2023
    Publication date: March 21, 2024
    Inventors: Kentaro ICHINOSEKI, Keiko KAWAMURA, Tatsuya NISHIWAKI, Kohei OASA
  • Publication number: 20240047571
    Abstract: According to one embodiment, a semiconductor device includes: a semiconductor layer including a first plane extending along a plane including a first axis and a second axis; a first electrode extending along the first axis; a second electrode extending along the second axis; and a third electrode above the first plane. The third electrode is electrically coupled to the first electrode and the second electrode, and includes a first portion, a second portion and a third portion. The first portion crosses the first electrode. The second portion crosses the second electrode. The third portion crosses the second electrode and is separate at a first end from the second portion.
    Type: Application
    Filed: October 5, 2023
    Publication date: February 8, 2024
    Inventors: Kentaro Ichinoseki, Tatsuya Nishiwaki, Kikuo Aida, Kohei Oasa
  • Patent number: 11869970
    Abstract: A semiconductor device includes an upper electrode; a lower electrode; a substrate positioned between the upper electrode and the lower electrode; a buried electrode part positioned between the substrate and the upper electrode, the buried electrode part including a gate electrode; and a silicon layer positioned between the substrate and the upper electrode. The silicon layer includes a mesa part next to the buried electrode part, a first region positioned between the mesa part and the substrate, and a second region positioned between the buried electrode part and the substrate. An energy level density of the first region is greater than an energy level density of the second region.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: January 9, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Kohei Oasa
  • Patent number: 11810975
    Abstract: According to one embodiment, a semiconductor device includes: a semiconductor layer including a first plane extending along a plane including a first axis and a second axis; a first electrode extending along the first axis; a second electrode extending along the second axis; and a third electrode above the first plane. The third electrode is electrically coupled to the first electrode and the second electrode, and includes a first portion, a second portion and a third portion. The first portion crosses the first electrode. The second portion crosses the second electrode. The third portion crosses the second electrode and is separate at a first end from the second portion.
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: November 7, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Kentaro Ichinoseki, Tatsuya Nishiwaki, Kikuo Aida, Kohei Oasa
  • Publication number: 20230078785
    Abstract: A semiconductor device includes a semiconductor part, first and second electrodes and a control electrode. The semiconductor part is provided between the first and second electrode. The semiconductor part includes first and third layers of a first conductivity type, and second, fourth and fifth layers of a second conductivity type. The first layer extends between the first and second electrodes. The second layer is provided between the first layer and the second electrode. The third semiconductor layer is provided between the second layer and the second electrode. The fourth layer is provided between the first layer and the first electrode. The semiconductor part includes an active region and a termination region. The active region includes the control electrode, the second layer, and the third layer. The termination region surrounds the active region. The fifth layer is provided in the first layer in the termination region.
    Type: Application
    Filed: January 24, 2022
    Publication date: March 16, 2023
    Inventors: Takako MOTAI, Tomoko MATSUDAI, Yoko IWAKAJI, Hiroko ITOKAZU, Kaori FUSE, Keiko KAWAMURA, Kohei OASA
  • Publication number: 20230085094
    Abstract: A semiconductor device includes: a second electrode, located in a semiconductor part, extending in a first direction; a third electrode, located in the semiconductor part, including a first portion, a second portion, and a first middle portion positioned below the second electrode between the first portion and the second portion, the second electrode being located between the first portion and the second portion in the first direction; a fourth electrode, located above the semiconductor part, including a pad portion separated from the second electrode and the second portion in a second direction, and a protrusion protruding from the pad portion and covering the second electrode and being connected to the second electrode; and a fifth electrode, located above the semiconductor part, including a first covering portion being connected to the first contact portion and a second covering portion being connected to the first portion.
    Type: Application
    Filed: February 10, 2022
    Publication date: March 16, 2023
    Inventors: Hiroki HATADA, Kohei OASA
  • Publication number: 20220302307
    Abstract: A semiconductor device includes an upper electrode; a lower electrode; a substrate positioned between the upper electrode and the lower electrode; a buried electrode part positioned between the substrate and the upper electrode, the buried electrode part including a gate electrode; and a silicon layer positioned between the substrate and the upper electrode. The silicon layer includes a mesa part next to the buried electrode part, a first region positioned between the mesa part and the substrate, and a second region positioned between the buried electrode part and the substrate. An energy level density of the first region is greater than an energy level density of the second region.
    Type: Application
    Filed: September 9, 2021
    Publication date: September 22, 2022
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Kohei OASA
  • Publication number: 20220140137
    Abstract: According to one embodiment, a semiconductor device includes: a semiconductor layer including a first plane extending along a plane including a first axis and a second axis; a first electrode extending along the first axis; a second electrode extending along the second axis; and a third electrode above the first plane. The third electrode is electrically coupled to the first electrode and the second electrode, and includes a first portion, a second portion and a third portion. The first portion crosses the first electrode. The second portion crosses the second electrode. The third portion crosses the second electrode and is separate at a first end from the second portion.
    Type: Application
    Filed: January 20, 2022
    Publication date: May 5, 2022
    Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Kentaro ICHINOSEKI, Tatsuya Nishiwaki, Kikuo Aida, Kohei Oasa
  • Publication number: 20220085208
    Abstract: A method for manufacturing a semiconductor device includes forming a trench in a first semiconductor layer of a first conductivity type; filling a first insulating film into the trench; etching the first insulating film to cause an upper surface of the first insulating film to recede lower than an opening of the trench and to expose a sidewall of an upper portion of the trench from under the first insulating film; forming a second-conductivity-type semiconductor region in a region of the first semiconductor layer next to the upper portion of the trench by implanting a second-conductivity-type impurity through the sidewall of the upper portion of the trench into the first semiconductor layer and by diffusing the second-conductivity-type impurity; and forming a gate electrode on the first insulating film in the upper portion of the trench after the forming of the second-conductivity-type semiconductor region.
    Type: Application
    Filed: September 9, 2021
    Publication date: March 17, 2022
    Inventors: Kohei OASA, Kouta TOMITA
  • Publication number: 20220085206
    Abstract: A semiconductor device includes first and second electrodes, first to third semiconductor regions, first and second conductive parts, a first conductive region, a first electrode region, and a conductive layer. The first-conductivity-type third semiconductor region is on the second-conductivity-type second semiconductor region, which is on a portion of the first-conductivity-type first semiconductor region, which is on and electrically connected to the first electrode. A portion of the first conductive part faces the second semiconductor region side surface. A portion of the second conductive part faces the first semiconductor region side surface. The second electrode is on and electrically connected to the second and third semiconductor regions. The first electrode region is electrically connected to the first conductive region, which is on and electrically connected to the second conductive part.
    Type: Application
    Filed: March 5, 2021
    Publication date: March 17, 2022
    Inventors: Kentaro Ichinoseki, Tsuyoshi Kachi, Kohei Oasa
  • Patent number: 11276775
    Abstract: According to one embodiment, a semiconductor device includes: a semiconductor layer including a first plane extending along a plane including a first axis and a second axis; a first electrode extending along the first axis; a second electrode extending along the second axis; and a third electrode above the first plane. The third electrode is electrically coupled to the first electrode and the second electrode, and includes a first portion, a second portion and a third portion. The first portion crosses the first electrode. The second portion crosses the second electrode. The third portion crosses the second electrode and is separate at a first end from the second portion.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: March 15, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, Toshiba Electronic Devices & Storage Corporation
    Inventors: Kentaro Ichinoseki, Tatsuya Nishiwaki, Kikuo Aida, Kohei Oasa
  • Patent number: 10998437
    Abstract: A semiconductor device according to an embodiment includes a semiconductor substrate having a first plane and a second plane, a semiconductor element provided in the semiconductor substrate, the semiconductor element including a gate insulating film provided in the first plane, a first electrode provided on the first plane, a second electrode provided on the first electrode, the second electrode including a first metal material, the second electrode having a film thickness of (65 [g·?m·cm?3])/(density of the first metal material [g·cm?3]) or more, a first solder portion provided on the second electrode, a third electrode provided on the first solder portion, a fourth electrode provided on the first plane, a fifth electrode provided on the fourth electrode, the fifth electrode including a second metal material, the fifth electrode having a film thickness of (65 [g·?m·cm?3])/(density of the second metal material [g·cm?3]) or more, a second solder portion provided on the fifth electrode, and a sixth electrode pr
    Type: Grant
    Filed: August 5, 2019
    Date of Patent: May 4, 2021
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Tatsuya Ohguro, Tatsuya Nishiwaki, Hideharu Kojima, Yoshiharu Takada, Kikuo Aida, Kentaro Ichinoseki, Kohei Oasa, Shingo Sato
  • Patent number: 10971621
    Abstract: A semiconductor device includes a semiconductor body, first and second electrodes, and first and second control electrodes. The first and second electrodes are provided on the semiconductor body. The first and second control electrodes each include a first portion positioned between the semiconductor body and the first electrode, a second portion positioned between the semiconductor body and the second electrode, and a third portion linked to the first and second portions. The semiconductor body includes first to fourth semiconductor layers. The second semiconductor layer is provided on the first semiconductor layer, and extends along the first to third portions. The fourth semiconductor layer is provided selectively on the second semiconductor layer, and extends along the second and third portions. The fourth semiconductor layer includes second conductivity-type impurities with a higher concentration than a concentration of second conductivity-type impurities in the second semiconductor layer.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: April 6, 2021
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Hiroaki Katou, Tatsuya Nishiwaki, Kohei Oasa, Toshifumi Nishiguchi
  • Publication number: 20200295180
    Abstract: According to one embodiment, a semiconductor device includes: a semiconductor layer including a first plane extending along a plane including a first axis and a second axis; a first electrode extending along the first axis; a second electrode extending along the second axis; and a third electrode above the first plane. The third electrode is electrically coupled to the first electrode and the second electrode, and includes a first portion, a second portion and a third portion. The first portion crosses the first electrode. The second portion crosses the second electrode. The third portion crosses the second electrode and is separate at a first end from the second portion.
    Type: Application
    Filed: September 3, 2019
    Publication date: September 17, 2020
    Applicants: KABUSHIKI KAISHA TOSHIBA, Toshiba Electronic Devices & Storage Corporation
    Inventors: Kentaro ICHINOSEKI, Tatsuya NISHIWAKI, Kikuo AIDA, Kohei OASA
  • Patent number: 10763352
    Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type having first and second surfaces and an impurity concentration distribution in a first direction from the second surface to the first surface, a first semiconductor region of a second conductivity between the semiconductor layer and the first surface, a second semiconductor region of a first conductivity type between the first semiconductor region and the first surface side, a first trench extending from the first surface into the semiconductor layer, a first electrode located in the first trench over a first insulating film and spaced from the first semiconductor region by a first insulating film, a second electrode located in the first trench over a second insulating film, a second trench extending from the first surface into the semiconductor layer and surrounding the first trench, and a third electrode located in the second trench over a third insulating film.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: September 1, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Hiroshi Matsuba, Hung Hung, Tatsuya Nishiwaki, Kohei Oasa, Kikuo Aida
  • Publication number: 20200266293
    Abstract: A semiconductor device includes a semiconductor body, first and second electrodes, and first and second control electrodes. The first and second electrodes are provided on the semiconductor body. The first and second control electrodes each include a first portion positioned between the semiconductor body and the first electrode, a second portion positioned between the semiconductor body and the second electrode, and a third portion linked to the first and second portions. The semiconductor body includes first to fourth semiconductor layers. The second semiconductor layer is provided on the first semiconductor layer, and extends along the first to third portions. The fourth semiconductor layer is provided selectively on the second semiconductor layer, and extends along the second and third portions. The fourth semiconductor layer includes second conductivity-type impurities with a higher concentration than a concentration of second conductivity-type impurities in the second semiconductor layer.
    Type: Application
    Filed: August 16, 2019
    Publication date: August 20, 2020
    Inventors: Hiroaki Katou, Tatsuya Nishiwaki, Kohei Oasa, Toshifumi Nishiguchi
  • Patent number: 10707312
    Abstract: According to one embodiment, there is provided a semiconductor device including a semiconductor substrate, a plurality of first columnar bodies having a peripheral edge, each of the columnar bodies spaced from one another on the semiconductor substrate, each including a first conductive layer extending from an upper end thereof in the depth direction of the semiconductor substrate, a base layer deposited about an outer peripheral surface of an upper end of the plurality of first columnar bodies, a gate adjacent to the base layer with a gate insulating film therebetween, a source layer connected to the base layer, and a second columnar body, including a second conductive layer, surrounding an outer peripheral edge of the plurality of first columnar bodies and extending in the depth direction of the semiconductor substrate.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: July 7, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Hiroshi Matsuba, Hung Hung, Tatsuya Nishiwaki, Kikuo Aida, Kohei Oasa
  • Publication number: 20200152785
    Abstract: A semiconductor device according to an embodiment includes a semiconductor substrate having a first plane and a second plane, a semiconductor element provided in the semiconductor substrate, the semiconductor element including a gate insulating film provided in the first plane, a first electrode provided on the first plane, a second electrode provided on the first electrode, the second electrode including a first metal material, the second electrode having a film thickness of (65 [g·?m·cm?3])/(density of the first metal material [g·cm?3]) or more, a first solder portion provided on the second electrode, a third electrode provided on the first solder portion, a fourth electrode provided on the first plane, a fifth electrode provided on the fourth electrode, the fifth electrode including a second metal material, the fifth electrode having a film thickness of (65 [g·m·cm?3])/(density of the second metal material [g·cm?3]) or more, a second solder portion provided on the fifth electrode, and a sixth electrode pro
    Type: Application
    Filed: August 5, 2019
    Publication date: May 14, 2020
    Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Tatsuya OHGURO, Tatsuya NISHIWAKI, Hideharu KOJIMA, Yoshiharu TAKADA, Kikuo AIDA, Kentaro ICHINOSEKI, Kohei OASA, Shingo SATO
  • Patent number: 10651276
    Abstract: A semiconductor device has a cell which includes a first semiconductor region of a first conductive type, a base region of a second conductive type on the first semiconductor region, a source region of the first conductive type on the base region, a gate electrode penetrating through the base region in a first direction to reach the first semiconductor region and extending in a second direction, and a gate insulting film between the gate electrode and the first semiconductor region, between the gate electrode and the base region, and between the gate electrode and the source region. The cell has a region having a first threshold voltage and a region having a second threshold voltage higher than the first threshold voltage.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: May 12, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsuya Nishiwaki, Kohei Oasa, Hiroshi Matsuba, Hung Hung, Kikuo Aida, Kentaro Ichinoseki
  • Patent number: 10593793
    Abstract: A semiconductor device according to an embodiment includes: a first semiconductor region of a first conductive type; a base region of a second conductive type; gate electrodes penetrating through the base region to reach the first semiconductor region; gate insulating films around the plurality of gate electrodes; a first region having a source region of the first conductive type, among a plurality of regions between the plurality of gate insulating films; a second region not having the source region among the plurality of regions, the second region being located in a terminal region of the first region; a first contact of a first width in the first region and electrically connecting the base region and a source electrode; and a second contact of a second width larger than the first width, the second contact being in the second region and electrically connecting the base region and the source electrode.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: March 17, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsuya Nishiwaki, Kohei Oasa, Hiroshi Matsuba, Kikuo Aida, Hung Hung