Patents by Inventor Kohei Tatara

Kohei Tatara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11663040
    Abstract: The computer system includes a node including a processor and a memory, and the processor and the memory serve as arithmetic operation resources. The computer system has an application program that operates using the arithmetic operation resources, and a storage controlling program that operates using the arithmetic operation resources for processing data to be inputted to and outputted from a storage device by the application program. The computer system has use resource amount information that associates operation states of the application program and the arithmetic operation resources that are to be used by the application program and the storage controlling program. The computer system changes allocation of the arithmetic operation resources to the application program and the storage controlling program used by the application program on the basis of an operation state of the application program and the use resource amount information.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: May 30, 2023
    Assignee: HITACHI, LTD.
    Inventors: Kohei Tatara, Yoshinori Ohira, Masakuni Agetsuma
  • Publication number: 20220100565
    Abstract: The computer system includes a node including a processor and a memory, and the processor and the memory serve as arithmetic operation resources. The computer system has an application program that operates using the arithmetic operation resources, and a storage controlling program that operates using the arithmetic operation resources for processing data to be inputted to and outputted from a storage device by the application program. The computer system has use resource amount information that associates operation states of the application program and the arithmetic operation resources that are to be used by the application program and the storage controlling program. The computer system changes allocation of the arithmetic operation resources to the application program and the storage controlling program used by the application program on the basis of an operation state of the application program and the use resource amount information.
    Type: Application
    Filed: March 19, 2021
    Publication date: March 31, 2022
    Applicant: HITACHI, LTD.
    Inventors: Kohei TATARA, Yoshinori OHIRA, Masakuni AGETSUMA
  • Publication number: 20220058044
    Abstract: A managing node includes a processor and a storage unit. A processor rearranges virtual machines arranged in managed nodes with high usage rates to other managed nodes based on a standard deviation of the usage rate of a CPU in a plurality of managed nodes, and selects the managed nodes in which many images of operating systems used by the virtual machine are stored, arranges the virtual machine, and starts up the virtual machine when a client starts up the virtual machine.
    Type: Application
    Filed: March 22, 2021
    Publication date: February 24, 2022
    Inventors: Taisuke ONO, Kohei TATARA, Masakuni AGETSUMA, Yoshinori OHIRA
  • Publication number: 20210042045
    Abstract: A multi-node storage system includes a plurality of nodes each configuring a node group having a hardware control unit that includes one or more drivers of a resource group of the node and a command control unit that, where the node receives an I/O (Input/Output) command, controls the hardware control unit in an I/O process in accordance with the I/O command. At least one node includes an allocation decision unit. The allocation decision unit decides resource allocation to the hardware control unit and the command control unit for one or more nodes on the basis of the I/O characteristics of the one or more nodes including the node. Of the resource quantity of the resource group of the node, a resource quantity allocated to each of the hardware control unit and the command control unit complies with the decided resource allocation in each of the one or more nodes.
    Type: Application
    Filed: March 3, 2020
    Publication date: February 11, 2021
    Inventor: Kohei TATARA
  • Patent number: 10853268
    Abstract: An information processing system including a processor, a memory, and a plurality of drives, wherein when a write request of new data is received, the processor stores the new data in the memory, transmits a response for the write request to a transmission source of the write request, reads old data updated by the new data from a first drive of the plurality of drives and old parity related to the old data from a second drive of the plurality of drives according to transmission of the response, store the old data and the old parity in the memory, generates new parity related to the new data from the new data, the old data, and the old parity stored in the memory, and stores the new data in the first drive to store the new parity in the second drive.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: December 1, 2020
    Assignee: HITACHI, LTD.
    Inventors: Miho Imazaki, Akira Yamamoto, Tomohiro Yoshihara, Kohei Tatara
  • Patent number: 10783096
    Abstract: A storage system provides a logical volume to a computer, manages the logical volume and a port receiving an I/O request for the logical volume in correspondence with each other, and holds assigned processor management information for managing correspondence between a processor for executing I/O processing based on an I/O request accumulated in a queue and an assigned port being a port corresponding to the queue. The processor identifies an assigned port on the basis of the assigned processor management information, executes I/O processing for the logical volume corresponding to the assigned port, and executes I/O processing on the basis of an I/O request received via the assigned port corresponding to another operation core.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: September 22, 2020
    Assignee: HITACHI, LTD.
    Inventors: Takashi Nagao, Tomohiro Yoshihara, Kohei Tatara, Miho Kobayashi
  • Publication number: 20190286583
    Abstract: A storage system provides a logical volume to a computer, manages the logical volume and a port receiving an I/O request for the logical volume in correspondence with each other, and holds assigned processor management information for managing correspondence between a processor for executing I/O processing based on an I/O request accumulated in a queue and an assigned port being a port corresponding to the queue. The processor identifies an assigned port on the basis of the assigned processor management information, executes I/O processing for the logical volume corresponding to the assigned port, and executes I/O processing on the basis of an I/O request received via the assigned port corresponding to another operation core.
    Type: Application
    Filed: August 30, 2018
    Publication date: September 19, 2019
    Applicant: HITACHI, LTD.
    Inventors: Takashi Nagao, Tomohiro Yoshihara, Kohei Tatara, Miho Kobayashi
  • Publication number: 20190012270
    Abstract: An information processing system including a processor, a memory, and a plurality of drives, wherein when a write request of new data is received, the processor stores the new data in the memory, transmits a response for the write request to a transmission source of the write request, reads old data updated by the new data from a first drive of the plurality of drives and old parity related to the old data from a second drive of the plurality of drives according to transmission of the response, store the old data and the old parity in the memory, generates new parity related to the new data from the new data, the old data, and the old parity stored in the memory, and stores the new data in the first drive to store the new parity in the second drive.
    Type: Application
    Filed: June 15, 2016
    Publication date: January 10, 2019
    Applicant: HITACHI, LTD.
    Inventors: Miho IMAZAKI, Akira YAMAMOTO, Tomohiro YOSHIHARA, Kohei TATARA
  • Patent number: 9760296
    Abstract: To detect an abnormality of logical and physical addresses, a storage device includes: plural drives each having a storage medium configuring a logical volume provided to a host device; a front end I/F that receives an I/O request including a logical address for identifying a logical storage area of the logical volume, and user data from the host computer; a processor that controls conversion from the logical address into the physical address for identifying a physical storage area of the storage medium; and a back end I/F that controls write/read of user data with respect to the drives based on the physical address. In the drives, data where a first guarantee code obtained based on the physical address and the logical address corresponding to the physical address is added to the user data is stored in the physical storage area designated by the physical address of the storage medium.
    Type: Grant
    Filed: May 20, 2013
    Date of Patent: September 12, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Takanobu Suzuki, Norio Shimozono, Hiroaki Akutsu, Kohei Tatara
  • Patent number: 9652165
    Abstract: Regardless of which of the multiple storage subsystems provided with the same identification information is accessed from a plurality of host computers, multiple volumes provided with the same identification information among the storage subsystems are subjected to extent exclusion sharing. Therefore, a multiplex volume provided with the same identification information among the plurality of storage subsystems and a first storage subsystem for processing input/output requests by the channel command to the multiplex volume are provided, wherein if the channel command received from the host computer or via a control unit of a second storage subsystem is an input/output request of the multiplex volume, a control unit of the first storage subsystem determines the access authority regarding an extent range of the multiplex volume designated by the channel command, based on information on whether an input/output processing regarding the extent range is already executed based on another request.
    Type: Grant
    Filed: March 21, 2013
    Date of Patent: May 16, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Naoko Ikegaya, Tomohiro Kawaguchi, Kohei Tatara
  • Patent number: 9465561
    Abstract: A storage system includes: a storage device including a recording medium that stores data and a device controller that executes addition processing involving a change of state of the data with respect to the data; and a storage controller that controls input and output of data for the storage device. The storage controller transmits, to the storage device, determination information that can be utilized by the device controller for determining whether or not to execute the addition processing along with input-output processing relating to input-output target data. The device controller controls execution of the addition processing with respect to the input-output target data based on the determination information transmitted from the storage controller.
    Type: Grant
    Filed: August 18, 2015
    Date of Patent: October 11, 2016
    Assignee: Hitachi, Ltd.
    Inventors: Tadato Nishina, Hiroaki Akutsu, Kohei Tatara, Norio Shimozono
  • Publication number: 20160292191
    Abstract: A server control unit controls data library devices each having cartridges which can be attached and detached, by using a first information table in which fault information concerning abnormal operations of the data library devices is registered and a second information table in which position information of the recording media is registered. In a case where the server control unit has identified a first one of the data library devices that cannot be controlled on the basis of the first information table, the server control unit determines whether a recording media storage unit can be detached from the first data library device.
    Type: Application
    Filed: February 17, 2016
    Publication date: October 6, 2016
    Inventors: Hajime MORI, Masayuki KOBAYASHI, Tsukasa SHIBAYAMA, Kohei TATARA
  • Patent number: 9423984
    Abstract: The storage system includes a plurality of storage devices. A storage controller is configured to manage a plurality of pages in a pool provided by at least one of the plurality of storage devices, to provide a virtual storage area to a host by allocating one or more pages from the pool dynamically, in which the virtual storage area is formed with a data area and a control information area. The storage controller is further configured to expand the virtual storage area on a unit basis, where the unit is a set of a given size area of the data area and a given size area of the control information area. In response to a write request from the host, the storage controller is configured to store data into the data area and to store control information for accessing to the data into the control information area.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: August 23, 2016
    Assignee: Hitachi, Ltd.
    Inventors: Kohei Tatara, Yoshiaki Eguchi, Hisaharu Takeuchi
  • Patent number: 9317423
    Abstract: The first storage apparatus provides a primary logical volume, and the second storage apparatus has a secondary logical volume. When the first storage apparatus receives a write command to the primary logical volume, a package processor in a flash package allocates first physical area in the flash memory chip to first cache logical area for write data and stores the write data to the allocated first physical area. And when the package processor receives journal data creation command form the processor, allocates the first physical area to second journal area for journal data without storing journal data corresponding to the write data.
    Type: Grant
    Filed: January 7, 2013
    Date of Patent: April 19, 2016
    Assignee: HITACHI, LTD.
    Inventors: Kohei Tatara, Akira Yamamoto, Junji Ogawa
  • Publication number: 20150378629
    Abstract: To detect an abnormality of logical and physical addresses, a storage device includes: plural drives each having a storage medium configuring a logical volume provided to a host device; a front end I/F that receives an I/O request including a logical address for identifying a logical storage area of the logical volume, and user data from the host computer; a processor that controls conversion from the logical address into the physical address for identifying a physical storage area of the storage medium; and a back end I/F that controls write/read of user data with respect to the drives based on the physical address. In the drives, data where a first guarantee code obtained based on the physical address and the logical address corresponding to the physical address is added to the user data is stored in the physical storage area designated by the physical address of the storage medium.
    Type: Application
    Filed: May 20, 2013
    Publication date: December 31, 2015
    Inventors: Takanobu SUZUKI, Norio SHIMOZONO, Hiroaki AKUTSU, Kohei TATARA
  • Publication number: 20150355857
    Abstract: Regardless of which of the multiple storage subsystems provided with the same identification information is accessed from a plurality of host computers, multiple volumes provided with the same identification information among the storage subsystems are subjected to extent exclusion sharing. Therefore, a multiplex volume provided with the same identification information among the plurality of storage subsystems and a first storage subsystem for processing input/output requests by the channel command to the multiplex volume are provided, wherein if the channel command received from the host computer or via a control unit of a second storage subsystem is an input/output request of the multiplex volume, a control unit of the first storage subsystem determines the access authority regarding an extent range of the multiplex volume designated by the channel command, based on information on whether an input/output processing regarding the extent range is already executed based on another request.
    Type: Application
    Filed: March 21, 2013
    Publication date: December 10, 2015
    Inventors: Naoko IKEGAYA, Tomohiro KAWAGUCHI, Kohei TATARA
  • Publication number: 20150355864
    Abstract: A storage system includes: a storage device including a recording medium that stores data and a device controller that executes addition processing involving a change of state of the data with respect to the data; and a storage controller that controls input and output of data for the storage device. The storage controller transmits, to the storage device, determination information that can be utilized by the device controller for determining whether or not to execute the addition processing along with input-output processing relating to input-output target data. The device controller controls execution of the addition processing with respect to the input-output target data based on the determination information transmitted from the storage controller.
    Type: Application
    Filed: August 18, 2015
    Publication date: December 10, 2015
    Inventors: Tadato NISHINA, Hiroaki AKUTSU, Kohei TATARA, Norio SHIMOZONO
  • Patent number: 9122399
    Abstract: A storage system includes: a storage device including a recording medium that stores data and a device controller that executes addition processing involving a change of state of the data with respect to the data; and a storage controller that controls input and output of data for the storage device. The storage controller transmits, to the storage device, determination information that can be utilized by the device controller for determining whether or not to execute the addition processing along with input-output processing relating to input-output target data. The device controller controls execution of the addition processing with respect to the input-output target data based on the determination information transmitted from the storage controller.
    Type: Grant
    Filed: April 18, 2013
    Date of Patent: September 1, 2015
    Assignee: HITACHI, LTD.
    Inventors: Tadato Nishina, Hiroaki Akutsu, Kohei Tatara, Norio Shimozono
  • Patent number: 9122415
    Abstract: The present invention aims at preventing the access performance of a distributed memory system by accessing via cross-over ownership a track mapping information formed as a hierarchical memory. In the process of assigning a real data storage area to a virtual volume, at first, a page from a pool is assigned, and thereafter, a track is assigned from said page. The page is composed of multiple tracks into which track data assigned at host write operation timings are stored sequentially from the top. A mapping information of the virtual volume and the page is stored in a control information page that differs from the track data, and the mapping information is stored in the control information page which could only be accessed by a microprocessor having the ownership of the virtual volume.
    Type: Grant
    Filed: January 15, 2014
    Date of Patent: September 1, 2015
    Assignee: Hitachi, Ltd.
    Inventor: Kohei Tatara
  • Patent number: 9015111
    Abstract: Data transfer between storage apparatuses is reduced, and performance of data access of a storage system is improved. In a case where a processor of a first storage apparatus receives a write request from a host computer as a request for data access to a virtual volume and a cache memory of any of the storage apparatuses is not allocated to a virtual storage area in the virtual volume designated by the data access request, the processor of the first storage apparatus selects a second storage apparatus and a third storage apparatus among candidates satisfying a predetermined state condition among the storage apparatuses based on connection information indicating connection between the storage apparatuses through a communication line.
    Type: Grant
    Filed: April 5, 2013
    Date of Patent: April 21, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Hirotoshi Akaike, Kazuhisa Fujimoto, Kohei Tatara, Katsuya Tanaka, Makio Mizuno