Patents by Inventor Koichi Yano
Koichi Yano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11956314Abstract: A network of a new configuration is flexibly constructed while maintaining a stable operation in the network. A management device includes: a detection unit that detects addition of a function unit to a network including one or a plurality of on-vehicle function units; an acquisition unit that acquires function unit information of a new function unit that is the function unit the addition of which has been detected by the detection unit and function unit information of each on-vehicle function unit, each piece of function unit information including information regarding network configuration of a layer lower than an application layer; and a generation unit that, based on the pieces of function unit information acquired by the acquisition unit, generates configuration information of a new network that is the network further including the new function unit.Type: GrantFiled: October 18, 2019Date of Patent: April 9, 2024Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO WIRING SYSTEMS, LTD., AUTONETWORKS TECHNOLOGIES, LTD.Inventors: Yusuke Yamamoto, Koichi Takayama, Hideyuki Tanaka, Tatsuya Izumi, Junji Yano, Yasuhiro Yabuuchi, Tadashi Matsumoto, Takeshi Hagihara
-
Patent number: 10503889Abstract: A mobile terminal that can be utilized for a checkpoint management system performs contactless electric communication with a reader/writer device for a passive RFID tag. An application processing unit cooperates with an application server through electronic communication. A position information acquisition unit acquires current position information of the mobile terminal. A terminal controller or a RFID tag processing unit receives a signal related to a carrier wave or a command emitted from the reader/writer device which results in a trigger that causes the application processing unit to operate. The application processing unit acquires from the mobile terminal personal information and chronologic information. The application processing unit further transmits the information to the application server together with current position information.Type: GrantFiled: October 20, 2015Date of Patent: December 10, 2019Assignee: The Aqua Enterprise CompanyInventor: Koichi Yano
-
Publication number: 20180117814Abstract: A method of molding a molded article, the method employing a die provided with a die main body including a movable mold and a fixed mold, a first slide core that is disposable inside the die main body, and a second slide core that is disposable inside the die main body in a state intersecting with the first slide core, and the method including: a mold-closing step including closing the die main body, disposing the first slide core inside the die main body, and disposing the second slide core inside the die main body to intersect with the first slide core; and a charging step of charging a molding material into the inside of the die, an undercut portion of the molded article being molded by the first slide core and the second slide core.Type: ApplicationFiled: October 26, 2017Publication date: May 3, 2018Inventors: Keisuke YAMADA, Tomoyuki TAKEYAMA, Koichi YANO
-
Publication number: 20170308692Abstract: A mobile terminal that can be utilized for a checkpoint management system performs contactless electric communication with a reader/writer device for a passive RFID tag. An application processing unit cooperates with an application server through electronic communication. A position information acquisition unit acquires current position information of the mobile terminal. A terminal controller or a RFID tag processing unit receives a signal related to a carrier wave or a command emitted from the reader/writer device which results in a trigger that causes the application processing unit to operate. The application processing unit acquires from the mobile terminal personal information and chronologic information. The application processing unit further transmits the information to the application server together with current position information.Type: ApplicationFiled: October 20, 2015Publication date: October 26, 2017Inventor: Koichi Yano
-
Publication number: 20140201127Abstract: An information acquiring apparatus acquires, when a travel object such as a traveler travels with transportation, passage time at which the travel object passes through each passage point at a departure/arrival facility, transportation specifying information indicating transportation, situation information indicating a situation and so forth. The travel process prediction apparatus stores the acquired information in an associated manner, and obtains a regression equation representing the relationship between items included in the transportation specifying information or situation information and passage time at a specific passage point, elapsed time while the travel object passes through two specific passage points or a result of comparison between the passage time and boarding completion time.Type: ApplicationFiled: March 14, 2014Publication date: July 17, 2014Applicant: THE AQUA ENTERPRISE COMPANYInventor: Koichi Yano
-
Patent number: 8706671Abstract: An information acquiring apparatus acquires, when a travel object such as a traveler travels with transportation, passage time at which the travel object passes through each passage point at a departure/arrival facility, transportation specifying information indicating transportation, situation information indicating a situation and so forth. The travel process prediction apparatus stores the acquired information in an associated manner, and obtains a regression equation representing the relationship between items included in the transportation specifying information or situation information and passage time at a specific passage point, elapsed time while the travel object passes through two specific passage points or a result of comparison between the passage time and boarding completion time.Type: GrantFiled: December 13, 2011Date of Patent: April 22, 2014Assignee: The Aqua Enterprise CompanyInventor: Koichi Yano
-
Publication number: 20130297549Abstract: An information acquiring apparatus acquires, when a travel object such as a traveler travels with transportation, passage time at which the travel object passes through each passage point at a departure/arrival facility, transportation specifying information indicating transportation, situation information indicating a situation and so forth. The travel process prediction apparatus stores the acquired information in an associated manner, and obtains a regression equation representing the relationship between items included in the transportation specifying information or situation information and passage time at a specific passage point, elapsed time while the travel object passes through two specific passage points or a result of comparison between the passage time and boarding completion time.Type: ApplicationFiled: December 13, 2011Publication date: November 7, 2013Applicant: THE AQUA ENTERPRISE COMPANYInventor: Koichi Yano
-
Publication number: 20130285806Abstract: The travel situation detection system specifies passage time at a check machine when a traveler or baggage passes through a passage point on a travel pathway at an airport, compares the passage time or passage period elapsed between two passage points with a mean value, and notifies the traveler or a worker of the comparison result by using the check machine or a terminal device. If the passage time or passage period is later or longer than the mean value, the traveler can rush to move while the worker who conveys baggage can be in hurry conveying the baggage. The travel situation detection system can further notify a waiting person or the like of the travel situation of the traveler by using the terminal device or a mobile terminal device. This allows the waiting person to understand the travel situation of the traveler.Type: ApplicationFiled: December 27, 2011Publication date: October 31, 2013Applicant: THE AQUA ENTERPRISE COMPANYInventor: Koichi Yano
-
Publication number: 20120231229Abstract: An injection molding mold 1 comprises: a mold body 21 in which a through hole 313 which communicates with a cavity 4 is formed; a tubular member 331 which is engaged with the through hole 313; and an insertion member 332 which is inserted into the tubular member 331 with a predetermined clearance C1. The first end face 331d of the tubular member 331 and the second end face 332a of the insertion member 332 stick out from the cavity surface 312a defining the cavity 4.Type: ApplicationFiled: May 23, 2012Publication date: September 13, 2012Applicant: FUJIKURA LTD.Inventor: Koichi YANO
-
Patent number: 8147131Abstract: A temperature sensing circuit that detects a given temperature includes a first differential input circuit and a second differential input circuit connected to the first differential input circuit. The first differential input circuit is configured to provide a first offset voltage with no temperature coefficient. The second differential input circuit is configured to provide a second offset voltage with a non-zero temperature coefficient. The given temperature is detected based on the first offset voltage and the second offset voltage. An electronic device using such a temperature sensing circuit is also disclosed.Type: GrantFiled: September 10, 2008Date of Patent: April 3, 2012Assignee: Ricoh Company, Ltd.Inventors: Tomoyuki Goto, Shin-ichi Kubota, Koichi Yano
-
Patent number: 7728556Abstract: A semiconductor device for protecting a rechargeable cell at least from excessive discharge current due to over discharge of the rechargeable cell, includes (a) a first excessive discharge current detection circuit configured to detect first excess of a voltage at an electric current detection terminal exceeding a first voltage level (Vs3), (b) a second excessive discharge current detection circuit configured to detect second excess of the absolute voltage at the electric current detection terminal exceeding a second voltage level (Vs4) higher than the first voltage level, (c) a delay circuit configured to cause each of the first and second excessive discharge current detection circuits to delay output by a predetermined delay time, and (d) a delay reducing circuit configured to produce a delay time reducing signal for reducing the delay time at a predetermined ratio.Type: GrantFiled: July 31, 2006Date of Patent: June 1, 2010Assignee: Ricoh Company, Ltd.Inventors: Koichi Yano, Akihiko Fujiwara
-
Publication number: 20090067471Abstract: A temperature sensing circuit that detects a given temperature includes a first differential input circuit and a second differential input circuit connected to the first differential input circuit. The first differential input circuit is configured to provide a first offset voltage with no temperature coefficient. The second differential input circuit is configured to provide a second offset voltage with a non-zero temperature coefficient. The given temperature is detected based on the first offset voltage and the second offset voltage. An electronic device using such a temperature sensing circuit is also disclosed.Type: ApplicationFiled: September 10, 2008Publication date: March 12, 2009Applicant: RICOH COMPANY, LTD.Inventors: Tomoyuki Goto, Shin-ichi Kubota, Koichi Yano
-
Patent number: 7495418Abstract: A semiconductor apparatus is disclosed, including: multiple parallel monitor circuits each configured to control charge to a capacitor by controlling a transistor that bypasses, if the voltage of the capacitor exceeds a predetermined reference voltage, charge current provided to the capacitor. The semiconductor apparatus further includes high voltage side IC connection output terminals each connected to an open drain of N channel transistor; high voltage side IC connection input terminals each connected to a terminal of a high resistance component and to an inverter input terminal; low voltage side IC connection output terminal each connected to an open drain of P channel transistor; and low voltage side IC connection input terminal each connected to a terminal of a high resistance component and to an inverter input terminal.Type: GrantFiled: March 22, 2005Date of Patent: February 24, 2009Assignee: Ricoh Company, Ltd.Inventors: Koichi Yano, Akihiko Fujiwara
-
Patent number: 7236346Abstract: A capacitor charging semiconductor apparatus including a plurality of serially connected capacitors to be charged. A direct current source is applied to the plurality of capacitors. A plurality of bypass transistors is provided to bypass charge current supplied to the plurality of capacitors when a voltage of a capacitor exceeds a prescribed reference level. A plurality of parallel monitor circuits is provided to control the plurality of bypass transistors to equally charge the plurality of capacitors. A plurality of capacitor connection terminals is connected to both ends and intersections of the plurality of capacitors. A plurality of transistor connection terminals is connected to the plurality of control terminals of the bypass transistor. A prescribed number of capacitors is optionally charged by increasingly shorting a number of capacitor connection terminals from the highest and lower voltage side capacitor connection terminals.Type: GrantFiled: November 8, 2004Date of Patent: June 26, 2007Assignee: Ricoh Company, Ltd.Inventors: Koichi Yano, Akihiko Fujiwara
-
Publication number: 20070030614Abstract: A semiconductor device for protecting a rechargeable cell at least from excessive discharge current due to over discharge of the rechargeable cell, includes (a) a first excessive discharge current detection circuit configured to detect first excess of a voltage at an externally or an internally provided electric current detection terminal exceeding a first voltage level (Vs3), (b) a second excessive discharge current detection circuit configured to detect second excess of the absolute voltage at the electric current detection terminal exceeding a second voltage level (Vs4) higher than the first voltage level, (c) a delay circuit configured to cause each of the first and second excessive discharge current detection circuits to delay its output by a predetermined delay time, and (d) a delay reducing circuit configured to produce a delay time reducing signal for reducing the delay time at a predetermined ratio when a negative voltage lower than a predetermined negative voltage level or a positive voltage higherType: ApplicationFiled: July 31, 2006Publication date: February 8, 2007Inventors: Koichi Yano, Akihiko Fujiwara
-
Patent number: 7078914Abstract: A parallel monitor circuit (1A) for monitoring one (C1) of serially connected plural capacitors (Cn) receiving a direct recharging current is disclosed. The circuit comprises a bypassing transistor (Q1) for bypassing the capacitor (C1) with the recharging current when the capacitor voltage (VSo1) exceeds a monitor voltage (Vr1) determined by a voltage setting circuit in order to equally recharge the capacitors. A transferring unit transfers a voltage control circuit (VS1) and an internal circuit connected to the voltage control circuit to a standby mode when the voltage control circuit receives a specific combination of voltage codes (RC1).Type: GrantFiled: March 29, 2005Date of Patent: July 18, 2006Assignee: Ricoh Company, Ltd.Inventors: Koichi Yano, Akihiko Fujiwara
-
Publication number: 20050285565Abstract: A parallel monitor circuit (1A) for monitoring one (C1) of serially connected plural capacitors (Cn) receiving a direct recharging current is disclosed. The circuit comprises a bypassing transistor (Q1) for bypassing the capacitor (C1) with the recharging current when the capacitor voltage (VSo1) exceeds a monitor voltage (Vr1) determined by a voltage setting circuit in order to equally recharge the capacitors. A transferring unit transfers a voltage control circuit (VS1) and an internal circuit connected to the voltage control circuit to a standby mode when the voltage control circuit receives a specific combination of voltage codes (RC1).Type: ApplicationFiled: March 29, 2005Publication date: December 29, 2005Inventors: Koichi Yano, Akihiko Fujiwara
-
Publication number: 20050231173Abstract: A semiconductor apparatus is disclosed, including: multiple parallel monitor circuits each configured to control charge to a capacitor by controlling a transistor that bypasses, if the voltage of the capacitor exceeds a predetermined reference voltage, charge current provided to the capacitor. The semiconductor apparatus further includes high voltage side IC connection output terminals each connected to an open drain of N channel transistor; high voltage side IC connection input terminals each connected to a terminal of a high resistance component and to an inverter input terminal; low voltage side IC connection output terminal each connected to an open drain of P channel transistor; and low voltage side IC connection input terminal each connected to a terminal of a high resistance component and to an inverter input terminal.Type: ApplicationFiled: March 22, 2005Publication date: October 20, 2005Inventors: Koichi Yano, Akihiko Fujiwara
-
Publication number: 20050185361Abstract: A capacitor charging semiconductor apparatus including a plurality of serially connected capacitors to be charged. A direct current source is applied to the plurality of capacitors. A plurality of bypass transistors is provided to bypass charge current supplied to the plurality of capacitors when a voltage of a capacitor exceeds a prescribed reference level. A plurality of parallel monitor circuits is provided to control the plurality of bypass transistors to equally charge the plurality of capacitors. A plurality of capacitor connection terminals is connected to both ends and intersections of the plurality of capacitors. A plurality of transistor connection terminals is connected to the plurality of control terminals of the bypass transistor. A prescribed number of capacitors is optionally charged by increasingly shorting a number of capacitor connection terminals from the highest and lower voltage side capacitor connection terminals.Type: ApplicationFiled: November 8, 2004Publication date: August 25, 2005Inventors: Koichi Yano, Akihiko Fujiwara
-
Patent number: 6701372Abstract: This invention can make data communications at an optimal transfer rate on the basis of the unarrived data volume on a network between two end terminals. For this purpose, a transmitting terminal (1-1) adds sequence number information to data generated by a data generator (1-11), and transmits the data to a receiving terminal (1-2) via a data transmitter (1-12). Since the receiving terminal (1-2) transmits data including the sequence number in the received data, the transmitting terminal determines that data (buffer capacity) corresponding to the difference between the current sequence number and the received sequence number remain on the network and calculates that volume using a network buffer data volume calculator (1-14) The transmitting terminal determines the transmission rate on the basis of the calculation result, and controls the data transmitter (1-12) to transfer data at that transmission rate.Type: GrantFiled: August 20, 1998Date of Patent: March 2, 2004Assignee: Canon Kabushiki KaishaInventors: Koichi Yano, Hiroaki Sato, Tomohiko Shimoyama