Patents by Inventor Koichi Yasutake

Koichi Yasutake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9403798
    Abstract: There is provided a novel triazinone compound that has an excellent T-type voltage-dependent calcium channel inhibitory activity and is specifically useful for treatment of pain. A compound of Formula (I), a tautomer of the compound, a pharmaceutically acceptable salt thereof, or a solvate thereof: where each substituent is defined in detail in the description or claims, for example R1 is H or C1-6 alkoxy, etc., each of L1 and L2 is independently a single bond or NR2, etc., L3 is C1-6 alkylene, etc., A is C6-14 aryl or 5 to 10-membered heteroaryl which is optionally substituted, etc., B is C3-11 cycloalkylene, etc., D is C6-14 aryl or 5 to 10-membered heteroaryl which is optionally substituted, etc.
    Type: Grant
    Filed: March 29, 2013
    Date of Patent: August 2, 2016
    Assignee: NISSAN CHEMICAL INDUSTRIES, LTD.
    Inventors: Noriko Saito, Jun Egi, Hiroshi Nagai, Megumi Ueno, Yusuke Shintani, Yusuke Inaba, Michiaki Adachi, Yuichi Hirai, Takeshi Kawazu, Koichi Yasutake, Daiki Takahashi
  • Publication number: 20150065705
    Abstract: There is provided a novel triazinone compound that has an excellent T-type voltage-dependent calcium channel inhibitory activity and is specifically useful for treatment of pain. A compound of Formula (I), a tautomer of the compound, a pharmaceutically acceptable salt thereof, or a solvate thereof: where each substituent is defined in detail in the description or claims, for example R1 is H or C1-6 alkoxy, etc., each of L1 and L2 is independently a single bond or NR2, etc., L3 is C1-6 alkylene, etc., A is C6-14 aryl or 5 to 10-membered heteroaryl which is optionally substituted, etc., B is C3-11 cycloalkylene, etc., D is C6-14 aryl or 5 to 10-membered heteroaryl which is optionally substituted, etc.
    Type: Application
    Filed: March 29, 2013
    Publication date: March 5, 2015
    Inventors: Noriko Saito, Jun Egi, Hiroshi Nagai, Megumi Ueno, Yusuke Shintani, Yusuke Inaba, Michiaki Adachi, Yuichi Hirai, Takeshi Kawazu, Koichi Yasutake, Daiki Takahashi
  • Patent number: 8347296
    Abstract: A priority control apparatus according to the present invention includes: an OS execution unit which executes first tasks that run on a first OS and second tasks that run on a second OS; a task priority obtainment unit which obtains the priority of an execution task which is a first task being executed by the OS execution unit and the priority of a requested task which is a second task whose execution is being requested to the OS execution unit; and a priority changing unit which, in the case where the priority of the requested task is higher than the priority of the execution task, changes the priorities of the first tasks to be lower than the priority of the requested task and higher than the next lower priority to the requested task among the second tasks, while maintaining the relative order of the priorities among the first tasks.
    Type: Grant
    Filed: December 1, 2010
    Date of Patent: January 1, 2013
    Assignee: Panasonic Corporation
    Inventor: Koichi Yasutake
  • Publication number: 20110072435
    Abstract: A priority control apparatus according to the present invention includes: an OS execution unit which executes first tasks that run on a first OS and second tasks that run on a second OS; a task priority obtainment unit which obtains the priority of an execution task which is a first task being executed by the OS execution unit and the priority of a requested task which is a second task whose execution is being requested to the OS execution unit; and a priority changing unit which, in the case where the priority of the requested task is higher than the priority of the execution task, changes the priorities of the first tasks to be lower than the priority of the requested task and higher than the next lower priority to the requested task among the second tasks, while maintaining the relative order of the priorities among the first tasks.
    Type: Application
    Filed: December 1, 2010
    Publication date: March 24, 2011
    Applicant: PANASONIC CORPORATION
    Inventor: Koichi YASUTAKE
  • Patent number: 7209993
    Abstract: An interrupt control apparatus comprising an interrupt vector register for holding address information corresponding to interrupt resources of a first type which are managed by an operating system and interrupt resources of a second type which are not managed by the operating system. Regarding an interrupt generated by an interrupt resource of the first type, the interrupt control apparatus in the present invention launches a common interrupt entry function which is subject to a scheduling process common to the interrupt resources of the first type, based on the address information of the interrupt vector register. At the same time, with regard to an interrupt generated by an interrupt resource of the second type, the interrupt control apparatus in the present invention launches an extended interrupt entry function which is not subject to the aforementioned scheduling process, based on the address information held in the interrupt vector register.
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: April 24, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akira Kitamura, Noboru Asai, Koichi Yasutake
  • Publication number: 20050144347
    Abstract: The interrupt control apparatus in the present invention includes an interrupt vector register for holding address information corresponding respectively to interrupt resources of first type which are managed by an operating system and interrupt resources of second type which are not managed by the operating system, from among the interrupt resources. With regard to an interrupt generated by an interrupt resource of first type managed by the operating system, the interrupt control apparatus in the present invention launches a common interrupt entry function which is subject to a scheduling process common to the interrupt resources of first type, based on the address information of the interrupt vector register.
    Type: Application
    Filed: November 24, 2004
    Publication date: June 30, 2005
    Inventors: Akira Kitamura, Noboru Asai, Koichi Yasutake
  • Patent number: 6266810
    Abstract: For updating the entire region of the control software stored in the memory of the information terminal, the invention provides a system and apparatus for remote program downloading characterized by downloading a download process program exclusive for downloading process in a region indifferent to download process by using control software at the terminal, downloading the download process program portion of the control software to be updated by using this exclusive download process program, and finally, by using this download process program, downloading the program other than the download process program portion of the control software to be updated.
    Type: Grant
    Filed: April 17, 1998
    Date of Patent: July 24, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hirofumi Tanaka, Koichi Yasutake, Tetsuji Maeda